ST16C650A(2005) 데이터 시트보기 (PDF) - Exar Corporation
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| ST16C650A Datasheet PDF : 0 Pages | |||
ST16C650A
2.90V TO 5.5V UART WITH 32-BYTE FIFO
xr
REV. 5.0.1
NAME
DDIS#
RESET
OP1#
OP2#
VCC
GND
NC
44- 48-
PLCC TQFP
PIN # PIN #
TYPE
DESCRIPTION
26
22
O Drive Disable Output
This pin goes to a logic 0 whenever the host CPU is reading data from the 650A. It
can control the direction of a data bus transceiver between the CPU and 650A or
other logic functions.
39
35
I Reset Input (active high)
A 40 ns minimum active pulse on this pin will reset the internal registers and all
outputs. The UART transmitter output will be held at logic 1, the receiver input will
be ignored and outputs are reset. See UART Reset Conditions in Table 13.
38
34
O Output Port 1
General purpose output.
35
31
O Output Port 2
General purpose output.
44
42
Pwr 2.90V to 5.5V supply voltage
All inputs are 5V tolerant except for XTAL for devices with date code top mark of
"HC YYWW" and newer. Devices with date code top mark of "GC YYWW" and
older do not have 5V tolerant inputs.
22
18
Pwr Power supply common ground
- 1, 13, - No Connect
25
Pin type: I=Input, O=Output, IO= Input/output, OD=Output Open Drain.
6
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