DS2118MB 데이터 시트보기 (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2118MB

Ultra2 LVD/SE SCSI Terminator

Dallas Semiconductor -> Maxim Integrated 

DS2118M

to minimize signal and power trace length, thereby resulting in less input capacitance and reflections

which can degrade the bus signals.

To maintain the specified regulation, a 4.7 µF capacitor is required between the Vref pin (VREF) and

ground of each DS2118M. A high frequency cap (0.1 µF ceramic recommended) can also be placed on

the Vref pin in applications that use fast rise/fall time drivers. A typical SCSI bus configuration is shown

in Figure 2.

NOTE:

DIFFSENS – Refers to the SCSI bus signal.

DIFFSENSE – Refers to the DS2118M pin name and internal circuitry capable of driving the

DIFFSENS line.

DIFF_CAP - Refers to the DS2118M pin name and internal circuitry relating to monitoring the

DIFFSENS line.

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