N87C42 데이터 시트보기 (PDF) - Intel

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N87C42

UNIVERSAL PERIPHERAL INTERFACE CHMOS 8-BIT SLAVE MICROCONTROLLER

Intel 

UPI-C42 UPI-L42

thereby providing additional user programmable

memory space This feature is enabled by the

A20EN instruction and remains enabled until the de-

vice is reset It is important to note that the execu-

tion of the A20EN instruction redefines Port 2 bit 1

as a pure output pin with read only characteristics

The state of this pin can be modified only through a

valid ‘‘D1’’ command sequence (see Table 1) Once

enabled the A20 logic will process a ‘‘D1’’ com-

mand sequence (write to output port) by setting re-

setting the A20 bit on port 2 bit 1 (P2 1) without

requiring service from the internal CPU The host

can directly control the status of the A20 bit At no

time during this host interface transaction will the

IBF flag in the status register be activated Table 1

gives several possible GATEA20 command data se-

quences and UPI-C42 responses

Table 1 D1 Command Sequences

A0 R W DB Pins IBF A20

Comments

1 W D1h

0 n(1) Set A20 Sequence

0 W DFh

0 1 Only DB1 Is Processed

1 W FFH(2) 0 n

1 W D1h

0 W DDh

1 W FFh

0 n Clear A20 Sequence

00

0n

1 W D1h

1 W D1h

0 W DFh

1 W FFh

0 n Double Trigger Set

0 n Sequence

01

0n

1 W D1h

0 n Invalid Sequence

1 W XXh(3) 1 n No Change in State

0 W DDh 1 n of A20 Bit

NOTES

1 Indicates that P2 1 remains at the previous logic level

2 Only FFh commands in a valid A20 sequence have no

effect on IBF An FFh issued at any other time will activate

IBF

3 Any command except D1

The above sequences assume that the GATEA20

logic has been enabled via the A20EN instruction

As noted only the value on DB 1 (data bus bit 1) is

processed This bit will be directly passed through to

P2 1 (port 2 bit 1)

SUSPEND

The execution of the suspend instruction (82h or

E2h) causes the UPI-C42 to enter the suspend

mode In this mode of operation the oscillator is not

running and the internal CPU operation is stopped

The UPI-C42 consumes s40 mA in the suspend

mode This mode can only be exited by RESET

CPU operation will begin from PC e 000h when the

UPI-C42 exits from the suspend power down mode

Suspend Mode Summary

 Oscillator Not Running

 CPU Operation Stopped

 Ports Tristated with Weak (E2–10 mA) Pull-Up

 Micropower Mode (ICC s 40 mA)

 This mode is exited by RESET

7

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