ADM8690ANZ 데이터 시트보기 (PDF) - Analog Devices

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ADM8690ANZ

Microprocessor Supervisory Circuits

Analog Devices 

ADM8690/ADM8691/ADM8695

Data Sheet

Pin No.

8-Lead 16-Lead

7

15

Mnemonic

RESET

N/A

16

RESET

Description

Logic Output. RESET goes low if VCC falls below the reset threshold or if the watchdog timer is not

serviced within its timeout period. The reset threshold is typically 4.65 V. RESET remains low for

50 ms (ADM8690/ADM8691) or 200 ms (ADM8695) after VCC returns above the threshold. RESET

also goes low for 50 ms (ADM8690/ADM8691) or 200 ms (ADM8695) if the watchdog timer is

enabled but not serviced within its timeout period. The RESET pulse width can be adjusted on

the ADM8691/ADM8695, as shown in Table 5. The RESET output has an internal 3 μA pull-up and

can either connect to an open-collector reset bus or directly drive a CMOS gate without an

external pull-up resistor.

Logic Output. RESET is an active high output. It is the inverse of RESET.

Rev. C | Page 8 of 24

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