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USS-820D

USB Device Controller

Agere -> LSI Corporation 

Data Sheet, Rev. 4

June 2001

USS-820D

USB Device Controller

Pin Information (continued)

Table 2. Pin Descriptions (continued)

44-Pin MQFP 48-Pin TQFP

(USS-820D) (USS-820TD)

27

30

28

31

29

32

30

33

31

32

33

35, 36, 37,

38, 39, 41,

42, 43

34

35

36

38, 39, 40,

41, 42, 44,

45, 46

Symbol*

IRQN

SOFN

RESET

NC†

IOCSN

WRN

RDN

D[7:0]

Type

Name/Description

O Interrupt (Programmable Active-Low or Active-High).

An interrupt signal is sent to the controller whenever an

event such as TX/RX done, SUSPEND, RESUME,

USBRESET, or SOF occurs.

O Start of Frame (Active-Low). This signal is asserted low

for eight tCLK periods when an SOF token is received.

I Reset. When this signal is held high, all state machines and

registers are set at the default state.

— No Connect. For compatibility with the USS-820 revision

B, this pin can be connected to a 3 V or 5 V supply with no

harmful effect.

I Chip Select (Active-Low).

I Control Register Write (Active-Low).

I Control Register Read (Active-Low).

I/O Data Bus.

* Active-low signals within this document are indicated by an N following the symbol names.

† Pins marked as NC must have no external connections, except where noted.

Register Timing Characteristics

All register timing specifications assume a 100 pF load on the D[7:0] package pins and a 70 pF load on all other

package pins.

Table 3. Timing Parameters

Symbol

tCLK

tRST

Internal Clock Period

RESET Assert Time

Parameter

Min Max

Unit

—

83.3

ns

500

—

ns

Agere Systems Inc.

9

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