MAX6818EAP 데이터 시트보기 (PDF) - Maxim Integrated
부품명
상세내역
제조사
MAX6818EAP Datasheet PDF : 8 Pages
| |||
MAX6816/MAX6817/
MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
Pin Description
MAX6816
1
2
—
—
3
—
—
4
PIN
MAX6817
2
—
1, 3
—
—
4, 6
—
5
—
—
—
—
MAX6818
10
—
—
2–9
—
—
12–19
20
1
11
NAME
FUNCTION
GND
IN
IN1, IN2
IN1–IN8
OUT
OUT2, OUT1
OUT8–OUT1
VCC
EN
CH
Ground
Switch Input
Switch Inputs
Switch Inputs
CMOS Debounced Output
CMOS Debounced Outputs
CMOS Debounced Outputs
+2.7V to +5.5V Supply Voltage
Active-Low, Three-State Enable Input for outputs. Resets CH.
Tie to GND to “always enable” outputs.
Change-of-State Output. Goes low on switch input change of
state. Resets on EN. Leave unconnected if not used.
VCC
VCC
RPU
IN
ESD
PROTECTION
VCC
OSC.
D
Q
COUNTER
R
DQ
LOAD
UNDER-
VOLTAGE
LOCKOUT
OUT
MAX6816
MAX6817
MAX6818
Figure 1. Block Diagram
Detailed Description
Theory of Operation
The MAX6816/MAX6817/MAX6818 are designed to
eliminate the extraneous level changes that result from
interfacing with mechanical switches (switch bounce).
Virtually all mechanical switches bounce upon opening or
closing. These switch debouncers remove bounce when
a switch opens or closes by requiring that sequentially
clocked inputs remain in the same state for a number of
sampling periods. The output does not change until the
input is stable for a duration of 40ms.
The circuit block diagram (Figure 1) shows the
functional blocks consisting of an on-chip oscillator, counter,
exclusive-NOR gate, and D flip-flop. When the input
does not equal the output, the XNOR gate issues a
counter reset. When the switch input state is stable for
the full qualification period, the counter clocks the flip-flop,
updating the output. Figure 2 shows the typical opening
and closing switch debounce operation. On the MAX6818,
the change output (CH) is updated simultaneously with the
switch outputs.
Undervoltage Lockout
The undervoltage-lockout circuitry ensures that the
out-puts are at the correct state on power-up. While
the supply voltage is below the undervoltage threshold
(typically 1.9V), the debounce circuitry remains
transparent. Switch states are present at the logic outputs
with no debouce delay.
www.maximintegrated.com
Maxim Integrated │ 4
Share Link: 