16F676 데이터 시트보기 (PDF) - Unspecified

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16F676

14-Pin, Flash-Based 8-Bit CMOS Microcontrollers

Unspecified 

PIC16F630/676

TABLE 2-1: PIC16F630/676 SPECIAL REGISTERS SUMMARY BANK 0

Addr Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, Page

BOD

Bank 0

00h

INDF

Addressing this location uses contents of FSR to address data memory (not a physical register)

01h

TMR0

Timer0 Module’s Register

02h

PCL

Program Counter’s (PC) Least Significant Byte

03h

STATUS

IRP(2)

RP1(2)

RP0

TO

PD

Z

DC

C

xxxx xxxx

xxxx xxxx

0000 0000

0001 1xxx

20,63

31

19

13

04h

FSR

05h

PORTA

Indirect data memory Address Pointer

—

—

I/O Control Registers

xxxx xxxx 20

--xx xxxx 21

06h

—

Unimplemented

07h

PORTC

—

—

I/O Control Registers

—

—

--xx xxxx 28

08h

—

Unimplemented

09h

—

Unimplemented

—

—

—

—

0Ah PCLATH

—

—

—

Write buffer for upper 5 bits of program counter

---0 0000 19

0Bh INTCON

GIE

PEIE

T0IE

INTE

RAIE

T0IF

0Ch PIR1

EEIF

ADIF

—

—

CMIF

—

0Dh

—

Unimplemented

0Eh TMR1L

Holding register for the Least Significant Byte of the 16-bit TMR1

0Fh TMR1H

Holding register for the Most Significant Byte of the 16-bit TMR1

INTF

—

RAIF 0000 0000 15

TMR1IF 00-- 0--0 17

—

—

xxxx xxxx 34

xxxx xxxx 34

10h

T1CON

—

T1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON -000 0000

36

11h

—

Unimplemented

—

—

12h

—

Unimplemented

—

—

13h

—

Unimplemented

14h

—

Unimplemented

15h

—

Unimplemented

16h

—

Unimplemented

17h

—

Unimplemented

—

—

—

—

—

—

—

—

—

—

18h

—

Unimplemented

—

—

19h

CMCON

—

COUT

—

CINV

CIS

CM2

CM1

1Ah

—

Unimplemented

1Bh

—

Unimplemented

1Ch

—

Unimplemented

1Dh

—

Unimplemented

1Eh

ADRESH(3) Most Significant 8 bits of the left shifted A/D result or 2 bits of right shifted result

CM0

-0-0 0000

39

—

—

—

—

—

—

—

—

xxxx xxxx 46

1Fh

ADCON0(3) ADFM

VCFG

—

CHS2

CHS1

CHS0 GO/DONE ADON 00-0 0000 47,63

Legend:

Note 1:

2:

3:

– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition shaded = unimplemented

Other (non Power-up) Resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during normal operation.

IRP and RP1 bits are reserved, always maintain these bits clear.

PIC16F676 only.

 2010 Microchip Technology Inc.

DS40039F-page 11

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