AD9704(RevD) 데이터 시트보기 (PDF) - Analog Devices
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AD9704 Datasheet PDF : 42 Pages
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AD9704/AD9705/AD9706/AD9707
Data Sheet
DIGITAL SPECIFICATIONS (1.8 V)
TMIN to TMAX, AVDD = 1.8 V, DVDD = 1.8 V, CLKVDD = 1.8 V, IOUTFS = 1 mA, unless otherwise noted.
Table 6.
Parameter
DIGITAL INPUTS1
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Input Capacitance
Input Setup Time, tS, 25°C
Input Hold Time, tH, 25°C
Input Setup Time, tS, −40°C to +85°C
Input Hold Time, tH, −40°C to +85°C
Latch Pulse Width, tLPW
CLK INPUTS2
Input Voltage Range
Common-Mode Voltage
Differential Voltage
AD9707
AD9706
AD9705
AD9704
Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
1.2 1.8
1.2 1.8
1.2 1.8
1.2 1.8
V
0 0.5
0 0.5
0 0.5
0 0.5 V
−10
+10 −10
+10 −10
+10 −10
+10 µA
+10
+10
+10
+10 µA
5
5
5
5
pF
2.3
2.3
2.3
2.3
ns
0
0
0
0
ns
2.4
2.4
2.4
2.4
ns
0.1
0.1
0.1
0.1
ns
6.2
6.2
6.2
6.2
ns
0
1.8 0
1.8 0
1.8 0
1.8 V
0.4 0.9 1.3 0.4 0.9 1.3 0.4 0.9 1.3 0.4 0.9 1.3 V
0.5 1.5
0.5 1.5
0.5 1.5
0.5 1.5
V
1 Includes CLK+ pin in single-ended clock input mode.
2 Applicable to CLK+ input and CLK– input when configured for differential clock input mode.
TIMING DIAGRAM
DB0 TO DB13
CLOCK
IOUTA
OR
IOUTB
tS
tPD
tH
tLPW
tST
0.1%
0.1%
Figure 2. Timing Diagram
Rev. D | Page 10 of 42
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