78F0547 데이터 시트보기 (PDF) - Unspecified

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78F0547

8-Bit Single-Chip Microcontrollers

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CONTENTS

CHAPTER 1 OUTLINE ............................................................................................................................ 17

1.1 Features .................................................................................................................................... 17

1.2 Applications ............................................................................................................................. 18

1.3 Ordering Information ............................................................................................................... 19

1.4 Pin Configuration (Top View).................................................................................................. 20

1.5 78K0/Kx2 Series Lineup .......................................................................................................... 22

1.6 Block Diagram.......................................................................................................................... 25

1.7 Outline of Functions ................................................................................................................ 26

CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 28

2.1 Pin Function List...................................................................................................................... 28

2.2 Description of Pin Functions .................................................................................................. 32

2.2.1 P00 to P06 (port 0).....................................................................................................................32

2.2.2 P10 to P17 (port 1).....................................................................................................................33

2.2.3 P20 to P27 (port 2).....................................................................................................................34

2.2.4 P30 to P33 (port 3).....................................................................................................................34

2.2.5 P40 to P47 (port 4).....................................................................................................................35

2.2.6 P50 to P57 (port 5).....................................................................................................................35

2.2.7 P60 to P67 (port 6).....................................................................................................................35

2.2.8 P70 to P77 (port 7).....................................................................................................................35

2.2.9 P120 to P124 (port 12)...............................................................................................................36

2.2.10 P130 (port 13) ............................................................................................................................36

2.2.11 P140 to P145 (port 14)...............................................................................................................37

2.2.12 AVREF .........................................................................................................................................37

2.2.13 AVSS ...........................................................................................................................................38

2.2.14 RESET .......................................................................................................................................38

2.2.15 REGC.........................................................................................................................................38

2.2.16 VDD and EVDD .............................................................................................................................38

2.2.17 VSS and EVSS .............................................................................................................................38

2.2.18 FLMD0 .......................................................................................................................................38

2.3 Pin I/O Circuits and Recommended Connection of Unused Pins....................................... 39

CHAPTER 3 CPU ARCHITECTURE...................................................................................................... 43

3.1 Memory Space.......................................................................................................................... 43

3.1.1 Internal program memory space ................................................................................................49

3.1.2 Memory bank (µPD78F0546, 78F0547, and 78F0547D only)....................................................50

3.1.3 Internal data memory space.......................................................................................................51

3.1.4 Special function register (SFR) area ..........................................................................................51

3.1.5 Data memory addressing ...........................................................................................................52

3.2 Processor Registers ................................................................................................................ 56

3.2.1 Control registers.........................................................................................................................56

3.2.2 General-purpose registers .........................................................................................................60

3.2.3 Special function registers (SFRs)...............................................................................................61

Preliminary User’s Manual U17397EJ2V1UD

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