DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

EVAL-ADCMP607BCPZ(RevB) 데이터 시트보기 (PDF) - Analog Devices

부품명
상세내역
제조사
EVAL-ADCMP607BCPZ Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADCMP606/ADCMP607
Q1
6Q
ADCMP606
VEE 2 TOP VIEW 5 VCCI/VCCO
(Not to Scale)
VP 3
4 VN
Figure 3. ADCMP606 Pin Configuration
Table 5. ADCMP606 (6-Lead SC70) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater than
the analog voltage at the inverting input, VN.
2
VEE
Negative Supply Voltage.
3
VP
Noninverting Analog Input.
4
VN
Inverting Analog Input.
5
VCCI/VCCO
Input Section Supply/Output Section Supply. Shared pin.
6
Q
Inverting Output. Q is at logic low if the analog voltage at the noninverting input, VP, is greater than the
analog voltage at the inverting input, VIN.
VCCO 1
VCCI 2
VEE 3
PIN 1
INDICATOR
ADCMP607
TOP VIEW
(Not to Scale)
9 VEE
8 LE/HYS
7 SDN
NOTES
1. EXPOSED PAD. IF CONNECTED, THE
EPAD MUST BE CONNECTED TO VEE.
Figure 4. ADCMP607 Pin Configuration
Table 6. ADCMP607 (12-Lead LFCSP) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VCCO
Output Section Supply.
2
VCCI
Input Section Supply.
3
VEE
Negative Supply Voltage.
4
VP
Noninverting Analog Input.
5
VEE
Negative Supply Voltage.
6
VN
Inverting Analog Input.
7
SDN
Shutdown. Drive this pin low to shut down the device.
8
LE/HYS
Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch.
9
VEE
Negative Supply Voltage.
10
Q
Inverting Output. Q is at logic low if the analog voltage at the noninverting input, VP, is greater than the
analog voltage at the inverting input, VN, if the comparator is in compare mode.
11
VEE
Negative Supply Voltage.
12
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater than
the analog voltage at the inverting input, VN, if the comparator is in compare mode.
Heat Sink
VEE
Paddle
The metallic back surface of the package is electrically connected to VEE. It can be left floating because
Pin 3, Pin 5, Pin 9, and Pin 11 provide adequate electrical connection. It can also be soldered to the
application board if improved thermal and/or mechanical stability is desired.
EPAD
Exposed Pad. If connected, the EPAD must be connected to VEE.
Rev. B | Page 7 of 14

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]