DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

LA76814K 데이터 시트보기 (PDF) - SANYO -> Panasonic

부품명
상세내역
제조사
LA76814K Datasheet PDF : 35 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
VIF Block Test Conditions
Input signal
Maximum RF AGC
voltage
Symbol
VRFH
Minimum RF AGC
voltage
VRFL
RF AGC
Delay Pt
(@DAC =
0)
RFAGC0
(@DAC =
63)
RFAGC63
Input sensitivity
Vi
No-signal
video output voltage
Sync signal tip level
VOn
VOtip
Video output
VO
amplitude
Video S/N
S/N
C-S beat level
IC-S
Differential gain
Differential phase
Maximum AFT
output voltage
Minimum AFT
output voltage
AFT detection
sensitivity
APC pull-in
range (U), (L)
DG
DP
VAFTH
VAFTL
VAFTS
fPU, fPL
LA76814
Test point
4
4
Input signal
SG1
80dBµ
Test method
Measure the DC voltage at pin 4.
SG1
80dBµ
Measure the DC voltage at pin 4.
Bus conditions
RF.AGC = "000000"
RF.AGC = "111111"
SG1
4
Obtain the input level at which the DC voltage at
pin 4 becomes 4.5V.
RF.AGC = "000000"
SG1
4
Obtain the input level at which the DC voltage at
pin 4 becomes 4.5V.
RF.AGC = "111111"
SG6
46
Using an oscilloscope, observe the level at pin 46
and obtain the input level at which the waveform's
p-p value becomes 1.4Vp-p.
No signal
Set IF AGC = “1” and measure the DC voltage at IF.AGC = “1”
46
pin 46.
SG1
46
80dBµ
Measure the DC voltage at pin 46.
SG6
46
80dBµ
Using an oscilloscope, observe the level at pin 46
and measure the waveform’s p-p value.
SG1
46
80dBµ
SG1
46
SG2
SG3
SG5
46
80dBµ
Measure the noise voltage at pin 46 with an RMS
voltmeter through a 10kHz to 4.2MHz band-pass
filter. ····Vsn
20Log (1.0/Vsn).
Input a 80dBµ SG1 signal and measure the DC
voltage (V3) at pin 3. Mix SG1 = 74dBµ, SG2 =
69dBµ, and SG3 = 49dBµ to enter the mixture in
the VIF IN. Apply V3 to pin 3 from an external DC
power supply. Using a spectrum analyzer,
measure the difference between pin 46’s 3.58MHz
component and 920kHz component.
Using a vector scope, measure the level at pin 46.
SG5
46
80dBµ
Using a vector scope, measure the level at pin 46.
SG4
10
80dBµ
Set and input the SG4 frequency to 44.75MHz.
Measure the DC voltage at pin 10 at that moment.
SG4
Set and input the SG4 frequency to 46.75MHz.
10
80dBµz
Measure the DC voltage at pin 10 at that moment.
SG4
Adjust the SG4 frequency and measure frequency
10
80dBµz
deviation f when the DC voltage at pin 10
changes from 1.5V to 3.5V.
VAFTS = 2000/f [mV/kHz]
SG4
46
80dBµ
Connect an oscilloscope to pin 46 and adjust the
SG4 frequency to a frequency higher than
45.75MHz to bring the PLL into unlocked mode.
(A beat signal appears.) Lower the SG4 frequency
and measure the frequency at which the PLL locks
again. In the same manner, adjust the SG4
frequency to a lower frequency to bring the PLL
into unlocked mode. Lower the SG4 frequency
and measure the frequency at which the PLL locks
again.
No.A0253-9/35

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]