FSA1256 데이터 시트보기 (PDF) - ON Semiconductor

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FSA1256

Low-RON Low-Voltage, Dual SPST Analog Switch with Low-ICCT “A” Option

ON Semiconductor 

Test Diagrams (Continued)

tRISE=2.5ns

B0nB1

VSW

GND

VIN

GND

RS

nA

CL

VOUT

RL

GND

VCC

Input - VSel

10%

0V

90%

VCC/2

VOUT

0.9*VOUT

tD

V Sel

GND

RL and CL are functions of the application

environment (50, 75, or 100 ).

CL includes test fixture and stray capacitance.

Figure 9. Break-Before-Make Interval Timing

0.9*VOUT

GND

VS

GND

GND

RS and RT are functions of the application

environment (50, 75, or 100 ).

Network Analyzer

RS

V IN

VS

GND

RT

GND

V OUT

Figure 10. Bandwidth

Network Analyzer

RS

RT

GND

VS

V Sel

GND

GND

GND

GND

V OUT

RT

RS and RT are functions of the application

GND

environment (50, 75, or 100 ).

Off Isolation= 20 Log (VOUT / VIN)

Figure 11. Channel Off Isolation

© 2004 Fairchild Semiconductor Corporation

FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0.9

7

www.fairchildsemi.com

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