RTD2120S-LF 데이터 시트보기 (PDF) - Realtek Semiconductor

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RTD2120S-LF

8051 Embedded Micro-Controller for Monitor

Realtek Semiconductor 

Realtek

RTD2120-series

The Clock Control register (CKCON – 8Eh) determines these timer speeds. When the relevant

CKCON bit is a logic 1, the device uses 4 clocks per cycle to generate timer speeds. When the control

bit is set to a zero, the device uses 12 clocks for timer speeds. The reset condition is a 0. CKCON.5

selects the speed of Timer 2. CKCON.4 selects Timer 1 and CKCON.3 selects Timer zero. Note that

unless a user desires very fast timing, it is unnecessary to alter these bits. Note that the timer controls

are independent.

Memory Organization

Internal Data memory

l 256 bytes of internal RAM

l 128 bytes of Special Function Register (SFR)

External Data memory

l 128 bytes of External Special Function Register (XFR)

l 256 bytes of DDCRAM(128-bytex2)

l 256 bytes of general purpose RAM

l 32k bytes of flash for EDID data and other parameters

External Program memory

l 64k bytes of flash for program memory

l The program content can not be read out unless user mass erase the flash first.

Internal Data Memory

FF

Internal RAM

Indirect addressing

80

7F

Internal RAM

Direct/Indirect

addressing

00

SFR

Direct addressing

Reset

External Data Memory External Program Memory

FFFF

XFR

FF00

FFFF

Unused

F9FF

DDC_RAM1&2

F900

F8FF

General Purpose RAM

F800

flash 0~64K

Unused

7FFF

flash 64~96K

0000

0000

There are five reset sources in RTD2120, as described below:

l RST pin

The external reset is high active and its pulse width must be larger than 16 mcu clock cycles. The

RST pin can reset the whole chip of RTD2120.

l Low voltage reset(LVR) and power on reset(POR)

The LVR and POR monitor the power status of RTD2120. The same as external reset, the LVR

and POR will reset the whole chip of RTD2120 when triggered.

l Software reset

confidential

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