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D17P136A

4-BIT SINGLE-CHIP MICROCONTROLLER

NEC => Renesas Technology 

CHAPTER 6 STACK .............................................................................................................................. 35

6.1 STACK CONFIGURATION ...................................................................................................................... 35

6.2 FUNCTIONS OF THE STACK ................................................................................................................ 35

6.3 ADDRESS STACK REGISTERS (ASRs) ............................................................................................... 36

6.4 INTERRUPT STACK REGISTERS (INTSKs) ........................................................................................ 36

6.5 STACK POINTER (SP) AND INTERRUPT STACK REGISTERS ........................................................ 37

6.6 STACK OPERATION ............................................................................................................................... 38

6.6.1 On Execution of Instructions CALL, RET, RETSK ................................................................... 38

6.6.2 Table Reference (MOVT DBF, @AR Instruction) ..................................................................... 38

6.6.3 Operation on Execution of Interrupt Receipt and RETI Instruction......................................... 39

6.7 STACK NESTING LEVELS AND THE PUSH AND POP INSTRUCTIONS ......................................... 39

CHAPTER 7 SYSTEM REGISTER (SYSREG) .................................................................................... 41

7.1 SYSTEM REGISTER CONFIGURATION ............................................................................................... 41

7.2 ADDRESS REGISTER (AR) ................................................................................................................... 43

7.2.1 Address Register Configuration ................................................................................................ 43

7.2.2 Address Register Functions ...................................................................................................... 43

7.3 WINDOW REGISTER (WR) .................................................................................................................... 45

7.3.1 Window Register Configuration ................................................................................................ 45

7.3.2 Window Register Functions ...................................................................................................... 45

7.4 BANK REGISTER (BANK) ..................................................................................................................... 46

7.4.1 Bank Register Configuration ..................................................................................................... 46

7.4.2 Functions of Bank Register ....................................................................................................... 46

7.5 INDEX REGISTER (IX) AND DATA MEMORY ROW ADDRESS POINTER

(MEMORY POINTER: MP) ...................................................................................................................... 47

7.5.1 Index Register (IX) .................................................................................................................... 47

7.5.2 Data Memory Row Address Pointer (Memory Pointer: MP) .................................................... 47

7.5.3 IXE = 0 and MPE = 0 (No Data Memory Modification) ........................................................... 49

7.5.4 IXE = 0 and MPE = 1 (Diagonal Indirect Data Transfer) ......................................................... 51

7.5.5 IXE = 1 and MPE = 0 (Index Modification) ............................................................................... 53

7.6 GENERAL REGISTER POINTER (RP) .................................................................................................. 57

7.6.1 General Register Pointer Configuration ................................................................................... 57

7.6.2 Functions of the General Register Pointer ............................................................................... 58

7.7 PROGRAM STATUS WORD (PSWORD) ............................................................................................... 59

7.7.1 Program Status Word Configuration ......................................................................................... 59

7.7.2 Functions of the Program Status Word .................................................................................... 60

7.7.3 Index Enable Flag (IXE) ............................................................................................................ 61

7.7.4 Zero Flag (Z) and Compare Flag (CMP) .................................................................................. 61

7.7.5 Carry Flag (CY) ......................................................................................................................... 61

7.7.6 Binary-Coded Decimal Flag (BCD) ........................................................................................... 62

7.7.7 Notes Concerning Use of Arithmetic Operations ..................................................................... 62

7.8 NOTES CONCERNING USE OF THE SYSTEM REGISTER ............................................................... 63

7.8.1 Reserved Words for the System Register ................................................................................ 63

7.8.2 Handling of System Register Addresses Fixed at 0 ................................................................ 65

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