DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

33975A_14 데이터 시트보기 (PDF) - Freescale Semiconductor

부품명
상세내역
제조사
33975A_14 Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics
Characteristics noted under conditions of 3.0V VDD 5.5V, 8.0V VPWR 28V, -40C TC 125C, unless otherwise noted.
Where applicable, typical values reflect the parameter’s approximate average value with VPWR = 13 V, TA = 25C.
Characteristic
Symbol
Min
Typ
Max
Unit
Pulse Wetting Current Time
Interrupt Delay Time
Normal Mode
Sleep Mode Switch Scan Time
Calibrated Scan Timer Accuracy
Sleep Mode
t PULSE (ON)
15
16
22
ms
t INT-DLY
s
5.0
16
t SCAN
100
200
300
s
tSCAN TIMER
%
10
Calibrated Interrupt Timer Accuracy
Sleep Mode
DIGITAL INTERFACE TIMING(13)
Required Low State Duration on VPWR for Reset(14)
VPWR 0.2V
tINT TIMER
t RESET
%
10
s
10
Falling Edge of CS to Rising Edge of SCLK
Required Setup Time
Falling Edge of SCLK to Rising Edge of CS
Required Setup Time
t LEAD
100
t LAG
50
ns
ns
SI to Falling Edge of SCLK
Required Setup Time
t SI (SU)
16
ns
Falling Edge of SCLK to SI
Required Hold Time
t SI (HOLD)
20
ns
SI, CS, SCLK Signal Rise Time(15)
SI, CS, SCLK Signal Fall Time(15)
Time from Falling Edge of CS to SO Low Impedance(16)
Time from Rising Edge of CS to SO High Impedance(17)
Time from Rising Edge of SCLK to SO Data Valid(18)
t R (SI)
t F(SI)
t SO (EN)
t SO (DIS)
t VALID
5.0
ns
5.0
ns
55
ns
55
ns
25
55
ns
Notes
13. These parameters are guaranteed by design. Production test equipment uses 4.16 MHz, 5.0V SPI interface.
14. This parameter is guaranteed by design but not production tested.
15. Rise and Fall time of incoming SI, CS, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing.
16. Time required for valid output status data to be available on the SO pin.
17. Time required for output states data to be terminated at the SO pin.
18. Time required to obtain valid data out from SO following the rise of SCLK with a 200pF load.
33975
10
Analog Integrated Circuit Device Data
Freescale Semiconductor

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]