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AS58C1001DG-25/XT(2008) 데이터 시트보기 (PDF) - Austin Semiconductor
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AS58C1001DG-25/XT
(Rev.:2008)
128K x 8 EEPROM EEPROM Memory
Austin Semiconductor
AS58C1001DG-25/XT Datasheet PDF : 21 Pages
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Austin Semiconductor, Inc.
EEPROM
AS58C1001
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
OE\
CE\
WE\
RES\
A0
A6
High Voltage Generator
Control Logic and Timing
I/O0
I/O7
I/O Buffer
and
Input Latch
Ready/Busy
Y Decoder
Y Gating
Address
Buffer and
Latch
A7
A16
X Decoder
Memory Array
MODE SELECTION
MODE
CE\
OE\
READ
V
IL
V
IL
STANDBY
V
IH
X
WRITE
V
V
IL
IH
DESELECT
V
V
IL
IH
WRITE
INHIBIT
X
X
X
V
IL
DATA
POLLING
V
IL
V
IL
PROGRAM
X
X
AS58C1001
Rev. 5.5 12/08
Data Latch
WE\
V
IH
X
V
IL
V
IH
V
IH
X
V
IH
X
RES\ RDY/BUSY\ I/O
V
H
High-Z
D
OUT
X
High-Z High-Z
V
H
High-Z
D
IN
V
H
High-Z High-Z
X
---
---
X
---
---
Data Out
V
H
V
OL
(I/O7)
V
IL
High-Z High-Z
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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