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ATC35 데이터 시트보기 (PDF) - Atmel Corporation

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ATC35
Atmel
Atmel Corporation Atmel
ATC35 Datasheet PDF : 14 Pages
First Prev 11 12 13 14
Compiled ROM
Megacells
Compiled memories are diffusion-programmed ROMs with a synchronous access proto-
col. The generated ROM Megacell is a single edge control ROM. Rising edge of the
memory enable signal (ME) latches the addresses and starts the read operation.
The internal idle state of the memory plane is the precharge state. The next clock cycle
can start with the next ME rising edge, once the precharge is complete.
The generator takes care of complementing the required address space to the nearest
physical size possible in case of number of words being not equal to an integral power
of two.
The range of permitted ROM configurations is as follows :
Number of words:
9...16384
Number of Address Bits: 4...14
Bits per words:
1...128
Total size:
9...131072 (128K)
Number of Columns:
4...512
Number of Rows:
4...256
The memory plane is organized in multiples of 4 rows, and multiples of 4, 8, 16, 32 or 64
columns.
The following table lists all ROM inputs and outputs and their pin capacitances:
Pin Name
ME
OE
ADD<i>
DO<j>
Comment
Clock Input
Output Enable Input
Address Input
Data Output
Capacitance (pF)
0.029
0.007
0.010
0.016 (if tristate)
3.20 (max load)
The following tables show the range of performances for particular ROM configurations.
Access time (tACC) and cycle time (tCYC) refer to Max industrial conditions, whereas
Dynamic Power dissipation refers to typical conditions.
Word Depth
Width (mm)
Height (mm)
Access Time (tACC) (nsec)
Cycle Time (tCYC) (nsec)
Dynamic Power (mW/MHz)
16
0.234
0.158
3.62
5.88
0.20
Word Size = 8
32
64
0.234 0.234
0.164 0.177
3.66
3.73
5.91
5.99
0.21
0.21
128
0.234
0.203
3.89
6.14
0.22
256
0.297
0.203
3.93
6.18
0.24
512
0.297
0.254
4.23
6.48
0.28
1K
0.423
0.254
3.66
6.56
0.35
Word Size = 16
Word Depth
16
32
64
128
256
512
1K
Width (mm)
0.297 0.297 0.297 0.297 0.297 0.423 0.423
Height (mm)
0.158 0.164 0.177 0.203 0.254 0.254 0.357
Access Time (tACC) (nsec)
Cycle Time (tCYC) (nsec)
Dynamic Power (mW/MHz)
3.66
3.70
3.77
3.93
4.23
4.31
4.92
5.95
5.99
6.06
6.21
6.51
6.59
7.19
0.34
0.35
0.35
0.37
0.41
0.48
0.63
12 ATC35 Summary
1063CS–CBIC–01/03

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