GS840H18AB-100 데이터 시트보기 (PDF) - Giga Semiconductor

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GS840H18AB-100

256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs

Giga Semiconductor 

BGA Pin Description

Symbol

A0, A1

A

DQA

DQB

DQC

DQD

BA, BB, BC, BD

CK

BW

GW

E1, E3

E2

G

ADV

ADSP, ADSC

ZZ

FT

LBO

VDD

VSS

VDDQ

NC

Type

I

I

I/O

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

-

GS840H18/32/36AT/B-180/166/150/100

Description

Address field LSBs and Address Counter Preset Inputs

Address Inputs

Data Input and Output pins

Byte Write Enable for DQA, DQB, DQC, DQD I/O’s; active low

Clock Input Signal; active high

Byte Write—Writes all enabled bytes; active low

Global Write Enable—Writes all bytes; active low

Chip Enable; active low

Chip Enable; active high

Output Enable; active low

Burst address counter advance enable; active low

Address Strobe (Processor, Cache Controller); active low

Sleep Mode control; active high

Flow Through or Pipeline mode; active low

Linear Burst Order mode; active low

Core power supply

I/O and Core Ground

Output driver power supply

No Connect

Rev: 1.11 10/2004

9/30

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 1999, GSI Technology

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