28F320S3 데이터 시트보기 (PDF) - Intel

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28F320S3

WORD-WIDE FlashFile™ MEMORY FAMILY

Intel 

28F160S3, 28F320S3

E

GND A10 VPP CE0 A14 VCC

A4 A7 A9 A11 A12 A15 A17 A19

A5 A6 A8 RP# A13 A16 A21 A20

A2 A1 A3

A18 CE1 NC

VCC A14 CE0 VPP A10 GND

A19 A17 A15 A12 A11 A9 A7 A4

A20 A21 A16 A13 RP# A8 A6 A5

NC CE1 A18

A3 A1 A2

NC NC BYTE#

DQ7 WP# WE#

A0 DQ8 DQ1 DQ3 DQ12 DQ6 DQ15 OE#

DQ0 DQ9 DQ2 DQ11 DQ4 DQ13 DQ14 STS

VCC DQ10 GND VCC DQ5 GND

WE# WP# DQ7

BYTE# NC NC

OE# DQ15 DQ6 DQ12 DQ3 DQ1 DQ8 A0

STSDQ14 DQ13 DQ4 DQ11 DQ2 DQ9 DQ0

GND DQ5 VCC GNDDQ10 VCC

Bottom View

This is the view of the package as surface mounted on

the board. Note that the signals are mirror imaged.

NOTES:

1. Figures are not drawn to scale.

2. Address A21 is not included in the 28F160S3.

3. More information on µBGA* packages is available by contacting your Intel/Distribution sales office.

Figure 4. µBGA* Package Pinout

2.0 PRINCIPLES OF OPERATION

The word-wide memories include an on-chip

Write State Machine (WSM) to manage block

erase, program, and lock-bit configuration

functions. It allows for: 100% TTL-level control

inputs, fixed power supplies during block erasure,

programming, lock-bit configuration, and minimal

processor overhead with RAM-like interface

timings.

After initial device power-up or return from deep

power-down mode (see Bus Operations), the

device defaults to read array mode. Manipulation

of external memory control pins allow array read,

standby, and output disable operations.

Read Array, Status Register, query, and identifier

codes can be accessed through the CUI

independent of the VPP voltage. Proper

programming voltage on VPP enables successful

block erasure, program, and lock-bit

configuration. All functions associated with

altering memory contents—block erase, program,

lock-bit configuration—are accessed via the CUI

and verified through the Status Register.

10

ADVANCE INFORMATION

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