EM658160 데이터 시트보기 (PDF) - Etron Technology
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EM658160 Datasheet PDF : 26 Pages
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Et r onT ec h
4Mx16 DDR SDRAM
EM658160
Electrical Characteristics and Recommended A.C. Operating Conditions
(VDD = 3.3 ± 0.3 V, Ta = 0~70 °C)
Symbol
Parameter
tRC Row cycle time
- 3.3/3.5/4/5/6/7/8
Min.
Max.
Unit
44/44/44/55/60/70/80
ns
tRFC Refresh row cycle time
56/56/56/70/84/91/96
ns
tRAS Row active time
32/32/32/40/42/49/56
120000
ns
tRCD /RAS to /CAS Delay
12/12/12/15/18/21/24
ns
tRP Row precharge time
12/12/12/15/18/21/24
ns
tRRD Row active to Row active delay
6.6/7/8/10/12/14/16
ns
twR Write recovery time
2
tCK
tCDLR Last data in to Read command
2.5tCK-tDQSS
tCK
tCCD Col. Address to Col. Address delay
1
tCK
tCK Clock cycle time
CL*=3
3.3/3.5/4/5/6/7/8
15
CL*=2.5
5/5/5.5/6/7.5/8/9
15
ns
CL*=2
6/6/7/8/9/10/11
15
tCH Clock high level width
0.45
0.55
tCK
tCL Clock low level width
tDQSCK DQS-out access time from CK,/CK
tAC Output access time from CK,/CK
tDQSQ DQS-DQ Skew
0.45
0.55
tCK
-0.6/-0.6/-0.6/-0.7/-0.7/-0.75/-0.8 0.6/0.6/0.6/0.7/0.7/0.75/0.8 ns
-0.6/-0.6/-0.6/-0.7/-0.7/-0.75/-0.8 0.6/0.6/0.6/0.7/0.7/0.75/0.8 ns
-0.5/-0.5/-0.5/-0.5/-0.5/-0.5/-0.6 0.5/0.5/0.5/0.5/0.5/0.5/0.6 ns
tRPRE Read preamble
0.9
1.1
tCK
tRPST Read postamble
0.4
0.6
tCK
tDQSS CK to valid DQS-in
0.75
1.25
tCK
tWPRES DQS-in setup time
0.4/0.4/0.4/0.4/0.45/0.5/0.55
ns
tWPREH DQS-in hold time
0.4/0.4/0.4/0.4/0.45/0.5/0.55
ns
tWPST DQS write postamble
0.4
0.6
tCK
tDQSH DQS in high level pulse width
0.4
0.6
tCK
tDQSL DQS in low level pulse width
0.4
tIS
Address and Control input setup time
1.1
0.6
tCK
ns
tIH
Address and Control input hold time
1.1
ns
tMRD Mode register set cycle time
1
tCK
tDS DQ & DM setup time to DQS
0.4/0.4/0.4/0.4/0.45/0.5/0.55
ns
tDH DQ & DM hold time to DQS
0.4/0.4/0.4/0.4/0.45/0.5/0.55
ns
tQH
tPDEX
tXSA
tXSR
Output DQS valid window
Power down exit time
Self refresh exit to active
command delay
Self refresh exit to read
command delay
0.3
tIS+1tCK
12/12/11/11/10/10/10
200
tCK
tIS+2tCK
ns
tCK
tCK
Etron Confidential
10
Rev. 1.1
Jan. 2002
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