EM658160 데이터 시트보기 (PDF) - Etron Technology

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EM658160

4M x 16 DDR Synchronous DRAM (SDRAM)

Etron Technology 

Et r onT ec h

4Mx16 DDR SDRAM

EM658160

• CAS Latency Field (A6~A4)

This field specifies the number of clock cycles from the assertion of the Read command to the

first read data. The minimum whole value of CAS Latency depends on the frequency of CK.

The minimum whole value satisfying the following formula must be programmed into this field.

tCAC(min) ≤ CAS Latency X tCK

A6

A5

A4

CAS Latency

0

0

0

Reserved

0

1

0

2 clocks

0

1

1

3 clocks

1

0

1

Reserved

1

1

0

2.5 clocks

1

1

1

Reserved (3.5 clocks)

• Test Mode field (A8~A7)

These two bits are used to enter the test mode and must be programmed to "00" in normal

operation.

A8 A7

0

0

1

0

X

1

• ( BS0, BS1)

Test Mode

Normal mode

DLL Reset

Test mode

BS1

BS0

RFU

0

RFU

1

An ~ A0

MRS Cycle

Extended Functions (EMRS)

Extended Mode Register Set (EMRS)

BS1

RFU

RFU

BS0 A11~ A1 A0

1

RFU

0

1

RFU

1

DLL Enable

DLL Disable

Etron Confidential

7

Rev. 1.1

Jan. 2002

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