GT28F400B3B150 데이터 시트보기 (PDF) - Intel

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GT28F400B3B150

SMART 3 ADVANCED BOOT BLOCK WORD-WIDE 4-MBIT (256K X 16), 8-MBIT (512K X 16), 16-MBIT (1024K X 16) FLASH MEMORY FAMILY

Intel 

E

7.1 Reset Operations

SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE

RP# (P) VIH

VIL

t PLPH

(A) Reset during Read Mode

tttPPPHHHQWELVL

RP# (P) VIH

Abort

Complete

t PLRH

t PHQV

t PHWL

t PHEL

VIL

t PLPH

(B) Reset during Program or Block Erase, t PLPH < t PLRH

RP# (P) VIH

VIL

Abort Deep

Complete Power-

t PLRH

Down

t PHQV

t

t

PHWL

PHEL

t PLPH

(C) Reset Program or Block Erase, t PLPH > t PLRH

0580_17

Figure 17. AC Waveform: Deep Power-Down/Reset Operation

Reset Specifications

Symbol

Parameter

VCC = 2.7–3.6V

Notes Min

Max

Unit

tPLPH

RP# Low to Reset during Read

1,3

100

ns

(If RP# is tied to VCC, this specification is not

applicable)

tPLRH

RP# Low to Reset during Block Erase or Program

2,3

22

µs

NOTES:

1. If tPLPH is < 100 ns the device may still RESET but this is not guaranteed.

2. If RP# is asserted while a block erase or word program operation is not executing, the reset will complete within 100 ns.

3. Sampled, but not 100% tested.

PRELIMINARY

43

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