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HDD16M64D8W 데이터 시트보기 (PDF) - Hanbit Electronics Co.,Ltd

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HDD16M64D8W Datasheet PDF : 10 Pages
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HANBit
HDD16M64D8W
This derating table is used to increase tDS/tDH in the case where the input slew rate is below 0.5V/ns. Input setup/hold slew rate
based on the lesser of AC-AC slew rate and DC-DC slew rate.
7. I/O Setup/Hold Slew Rate Derating
Input Setup/Hold Slew Rate
Δ tIS
(V/ns)
(ps)
0.5
0
0.4
+75
0.3
+150
Δ tIH
(ps)
0
+75
+150
This derating table is used to increase tDS/tDH in the case where the I/O slew rate is below 0.5V/ns. I/O setup/hold slew rate
based on the lesser of AC-AC slew rate and DC-DC slew rate.
8. I/O Setup/Hold Plateau Derating
I/O Input Level
Δ tDS
(mV)
(ps)
± 280
+50
Δ tDH
(ps)
+50
This derating table is used to increase tDS/tDH in the case where the input level is flat below VREF ± 310mV for a duration of up to 2ns.
9. I/O Delta Rise/Fall Rate(1/slew-rate) Derating
Delta Rise/Fall Rate
Δ tDS
(ns/V)
(ps)
0
0
±0.25
+50
±0.5
+100
Δ tDH
(ps)
0
+50
+100
This derating table is used to increase tDS/tDH in the case where the DQ and DQS slew rates differ. The Delta Rise/Fall Rate
is calated as 1/SlewRate1-1/SlewRate2. For example, if slew rate 1 = 5V/ns and slew rate 2 =.4V/ns then the Delta Rise/Fall
Rate =-0/5ns/V. Input S/H slew rate based on larger of AC-AC delta rise/fall rate and DC-DC delta rise/fall rate.
10. This parameter is fir system simulation purpose. It is guranteed by design.
11. For each of the terms, if not already an integer, round to the next highest integer. tCK is actual to the system clock cycle time.
COMMAND TRUTH TABLE (V=VALID, X=DOν¢T CARE, H=LOGIC HIGH, L=LOGIC LOW)
COMMAND
CKE CKE
n-1
n
/CS /RAS /CAS /WE DM
BA
0,1
A10/
AP
A11
A9~A0
NOTE
Register Extended MRS
H
X
L
L
L
LX
OP code
1,2
Register Mode register set
H
X
L
L
L
LX
OP code
1,2
Auto refresh
H
3
H
L
L
L
HX
X
Entry
L
3
Refresh Self
L
H
H
H
3
refresh Exit
L
H
X
X
H
X
X
X
3
Bank active & Row Addr.
H
X
L
L
H
HXV
Row address
Auto precharge
Read &
L
Column
4
disable
column
H
X
L
H
L
HXV
Address
Auto precharge
address
H (A0 ~ A9)
4
eable
Auto precharge
Write &
H
L
Column
4
disable
column
H
X
L
H
L
XV
Address
Auto precharge
address
L
H (A0 ~ A9) 4,6
enable
Burst Stop
H
X
L
H
H
LX
X
7
Bank selection
V
L
Precharge
H
X
L
L
H
LX
X
All banks
X
H
5
H
X
X
X
Clock suspend or Entry
H
L
X
L
V
V
V
X
active power down
Exit
L
H
X
X
X
XX
Precharge power
H
X
X
X
X
Entry
H
L
X
down mode
L
H
H
H
URL : www.hbe.co.kr
REV 2.0 (November.2002)
8
HANBit Electronics Co.,Ltd.

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