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HEC4040 데이터 시트보기 (PDF) - Philips Electronics

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HEC4040
Philips
Philips Electronics Philips
HEC4040 Datasheet PDF : 5 Pages
1 2 3 4 5
Philips Semiconductors
12-stage binary counter
DESCRIPTION
The HEF4040B is a 12-stage binary ripple counter with a
clock input (CP), an overriding asynchronous master reset
input (MR) and twelve fully buffered outputs (O0 to O11).
The counter advances on the HIGH to LOW transition of
CP. A HIGH on MR clears all counter stages and forces all
outputs LOW, independent of CP. Each counter stage is a
static toggle flip-flop. Schmitt-trigger action in the clock
input makes the circuit highly tolerant to slower clock rise
and fall times.
Product specification
HEF4040B
MSI
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
HEF4040BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4040BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4040BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
PINNING
CP
MR
O0 to O11
clock input (HIGH to LOW edge-triggered)
master reset input (active HIGH)
parallel outputs
APPLICATION INFORMATION
Some examples of applications for the HEF4040B are:
Frequency dividing circuits
Time delay circuits
Control counters
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
January 1995
2

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