HEF4093B(2015) 데이터 시트보기 (PDF) - NXP Semiconductors.
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HEF4093B Datasheet PDF : 14 Pages
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HEF4093B
Quad 2-input NAND Schmitt trigger
6.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
VDD
VSS
Pin description
Pin
1, 5, 8, 12
2, 6, 9, 13
3, 4, 10, 11
14
7
7. Functional description
Description
input
input
output
supply voltage
ground (0 V)
Table 3. Function table[1]
Input
nA
nB
L
L
L
H
H
L
H
H
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Output
nY
H
H
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min
Max Unit
VDD
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
0.5
+18 V
-
10 mA
0.5 VDD + 0.5 V
-
10 mA
II/O
input/output current
-
10 mA
IDD
Tstg
Tamb
Ptot
supply current
storage temperature
ambient temperature
total power dissipation
Tamb = 40 C to +125 C
SO14
-
65
40
[1]
-
50 mA
+150 C
+125 C
500 mW
P
power dissipation
per output
-
100 mW
[1] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.
HEF4093B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 15 December 2015
© Nexperia B.V. 2017. All rights reserved
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