HEF4093BP,652 데이터 시트보기 (PDF) - NXP Semiconductors.
부품명
상세내역
제조사
HEF4093BP,652 Datasheet PDF : 15 Pages
| |||
NXP Semiconductors
HEF4093B
Quad 2-input NAND Schmitt trigger
6.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
VDD
VSS
Pin description
Pin
1, 5, 8, 12
2, 6, 9, 13
3, 4, 10, 11
14
7
Description
input
input
output
supply voltage
ground (0 V)
7. Functional description
Table 3.
Input
nA
L
L
H
H
Function table[1]
nB
L
H
L
H
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Output
nY
H
H
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min
Max
Unit
VDD
IIK
VI
IOK
II/O
IDD
Tstg
Tamb
Ptot
supply voltage
input clamping current
input voltage
output clamping current
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
Tamb = 40 C to +125 C
DIP14
0.5
-
0.5
-
-
-
65
40
[1] -
+18
V
10
mA
VDD + 0.5 V
10
mA
10
mA
50
mA
+150
C
+125
C
750
mW
SO14
[2] -
500
mW
P
power dissipation
per output
-
100
mW
[1] For DIP14 packages: above Tamb = 70 C, Ptot derates linearly with 12 mW/K.
[2] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.
HEF4093B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
3 of 15
Share Link: 