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HEF4093BP 데이터 시트보기 (PDF) - NXP Semiconductors.

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HEF4093BP
NXP
NXP Semiconductors. NXP
HEF4093BP Datasheet PDF : 15 Pages
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NXP Semiconductors
12. Waveforms
HEF4093B
Quad 2-input NAND Schmitt trigger
VI
input
10 %
0V
tr
90 %
VM
tPHL
VOH
output
VOL
90 %
VM
10 %
tTHL
tf
tPLH
tTLH
001aag197
Fig 4.
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
tr, tf = input rise and fall times.
Propagation delay and output transition time
Table 9. Measurement points
Supply voltage
VDD
5 V to 15 V
Input
VM
0.5VDD
Output
VM
0.5VDD
VDD
VI
G
VO
DUT
RT
CL
001aag182
Fig 5.
Test data given in Table 10.
Definitions for test circuit:
DUT = Device Under Test.
CL = load capacitance including jig and probe capacitance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Test circuit
Table 10. Test data
Supply voltage
VDD
5 V to 15 V
Input
VI
VSS or VDD
tr, tf
20 ns
Load
CL
50 pF
HEF4093B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
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