HM64YLB36514 Series
Input Capacitance (VDD = 2.5 V, VDDQ = 1.5 V, Ta = +25°C, f = 1 MHz)
Parameter
Symbol Min Max Unit Pin name
Input capacitance
C
IN
4 pF SAn, SS, SWE, SWEx
Clock input capacitance
CCLK
5 pF K, K
I/O capacitance
CIO
5 pF DQxn
Notes: 1. This parameter is sampled and not 100% tested.
2. Exclude G
3. Connect pins to GND, except VDD, VDDQ, and the measured pin.
Notes
1, 3
1, 2, 3
1, 3
AC Test Conditions
Parameter
Symbol Conditions
Input and output timing reference levels
Input signal amplitude
Input rise / fall time
VREF
VIL, VIH
tr, tf
0.75
0.25 to 1.25
0.5 (10% to 90%)
Clock input timing reference level
Differential cross point
VDIF to clock
VCM to clock
Output loading conditions
0.75
1.10
See figure below
Note:
Parameters
are
tested
with
RQ
=
250
Ω
and
V
DDQ
=
1.5
V.
Unit Note
V
V
ns
V
V
Output Loading Conditions
16.7 Ω
DQ
16.7 Ω
16.7 Ω
50 Ω
50 Ω
5 pF
5 pF
0.75 V
50 Ω
0.75 V
50 Ω
0.75 V
Rev.0.10, May.15.2003, page 15 of 22