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IH5352CBP

Quad SPST, CMOS RF/Video Switch

Intersil 

IH5352

Detailed Description

Figure 5 shows the internal circuit of one channel of the

IH5352. Here, a shunt switch is closed, and the two series

switches are open when the video switch channel is open or

off. This provides much better isolation between the input

and output terminals than a simple series switch does,

especially at high frequencies. The result is excellent off-

isolation in the Video and RF frequency ranges when

compared to conventional analog switches.

The control input level shifting circuitry is very similar to that

of the IH5140 series of Analog Switches, and gives very high

speed, guaranteed “Break-Before-Make” action, low static

power consumption and TTL compatibility.

SWITCH

SOURCE

(VIDEO INPUT)

LOGIC

CONTROL

INPUT

DRIVER

TRANSLATOR

SHUNT

SWITCH

SWITCH

DRAIN

(VIDEO

OUTPUT)

NOTE: 1 channel of 4 shown.

FIGURE 5. INTERNAL SWITCH CONFIGURATION

Typical Applications

Charge Compensation Techniques

Charge injection results from the signals out of the level

translation circuit being coupled through the gate-channel

and gate-source/drain capacitances to the switch inputs and

outputs. This feedthrough is particularly troublesome in

Sample-and-Hold or Track-and-Hold applications, as it

causes a Sample (Track) to Hold offset. The IH5352 has a

typical injected charge of 30pC-50pC (corresponding to

30mV-50mV on a 1000pF capacitor), at VS-D of about 0V.

This Sample (Track) to Hold offset can be compensated by

bringing in a signal equal in magnitude but of the opposite

polarity. The circuit of Figure 6 accomplishes this charge

injection compensation by using one side of the device as a

S & H (T & H) switch, and the other side as a generator of a

compensating signal. The 1kΩ potentiometer allows the user

to adjust the net injected charge to exactly zero for any

analog voltage in the -5V to +5V range.

Since individual parts are very consistent in their charge

injection, it is possible to replace the potentiometer with a

pair of fixed resistors, and achieve less than 5mV error for

all devices without adjustment.

An alternative arrangement, using a standard TTL inverter to

generate the required inversion, is shown in Figure 7. The

capacitor needs to be increased, and becomes the only method

of adjustment. A fixed value of 22pF is good for analog values

referred to ground, while 35pF is optimum for AC coupled

signals referred to -5V as shown in the figure. The choice of -5V

is based on the virtual disappearance at this analog level of the

transient component of switching charge injection. This

combination will lead to a virtually “glitch-free” switch.

75Ω

15V

1µF

VOUT

S1 V+

ANALOG

D1

INPUT

IN1

V-

5V

VL S2

D2

-15V

1kΩ CERMET

NOT WIRE

WOUND (NOTE)

IN2

GND

75Ω

10pF

CHOLD

1000pF

+3V

0V

TTL IN (STROBE)

1µF

NOTE: Adjust pot for 0mVP-P step at VOUT with no analog (AC)

signal present.

FIGURE 6. CHARGE INJECTION COMPENSATION

5

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