IMC020FLSA-ET15 데이터 시트보기 (PDF) - Intel

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IMC020FLSA-ET15

SERIES 2 FLASH MEMORY CARDS

Intel 

SERIES 2 FLASH MEMORY CARDS

PRINCIPLES OF OPERATION

Intel’s Series 2 Flash Memory Card provides electri-

cally-alterable non-volatile random-access storage

Individual 28F008SA devices utilize a Command

User Interface (CUI) and Write State Machine

(WSM) to simplify block-erasure and data write oper-

ations

COMMON MEMORY ARRAY

Figure 4 shows the Common Memory Plane’s orga-

nization The first block pair (64 KWords) of Com-

mon Memory referred to as the Common Memory

Card Information Structure Block optionally extends

the hardwired CIS in the Attribute Memory Plane for

additional card information This may be written dur-

ing initial card formatting for OEM customization

Since this CIS Block is part of Common Memory its

data can be altered Write access to the Common

Memory CIS Block is controlled by the Write Protect

Control Register which may be activated by system

software after power-up Additionally the entire

Common Memory plane (minus the Common Memo-

ry CIS Block) may be software write protected Note

that the Common Memory CIS Block is not part of

the Attribute Memory Plane Do not assert REG to

access the Common Memory CIS Block

13FFFFFH

1200000H

Device Pair 9

1000000H

Device Pair 8

0E00000H

Device Pair 7

0C00000H

Device Pair 6

0A00000H

Device Pair 5

0800000H

Device Pair 4

0600000H

Device Pair 3

0400000H

Device Pair 2

0200000H

Device Pair 1

0020000H

Device Pair 0

0000000H

Optional CIS

Figure 4 Common Memory Plane Use

the Optional Common Memory Plane

CIS for Custom Card Format Information

HARDWIRED CIS

The card’s structure description resides in the even-

byte locations starting at 0000H and going to the

CIS ending tuple (FNULL) within the Attribute Memo-

ry Plane Data included in the hardwired CIS con-

sists of tuples Tuples are a variable-length list of

data blocks describing details such as manufactur-

er’s name the size of each memory device and the

number of flash devices within the card

COMPONENT MANAGEMENT

REGISTERS (CMRs)

The CMRs in the Attribute Memory Plane provide

special software-controlled functionality Card Con-

trol Logic includes circuitry to access the CMRs

REG (PCMCIA pin 61) selects the Attribute Memory

Plane (and therefore the CMRs) when equal to VIL

CMRs are classified into two categories those de-

fined by PCMCIA R2 1 and those included by Intel

(referred to as Performance Enhancement Regis-

ters) to enhance the interface between the host sys-

tem and the card’s flash memory array CMRs (See

Figure 3) provide seven control functions Ready-

Busy Interrupt Mode Device Ready-Busy Status

Device Ready-Busy Mask Reset-PowerDown Con-

trol Software-controlled Write Protection Card

Status and Soft Reset

SOFT RESET REGISTER (PCMCIA)

(CONFIGURATION OPTION)

The SOFT RESET REGISTER (Attribute Memory

Plane Address 4000H Figure 5) is defined in the

PCMCIA Release 2 0 specification as the Configura-

tion Option Register

Bit 7 is the soft reset bit (SRESET) Writing a 1 to

this bit initiates card reset to the power-on default

state (see Side Bar page 11) This bit must be

cleared to use the CMRs or to access the devices

SRESET implements in software what the reset pin

implements in hardware On power-up the card au-

tomatically assumes default conditions Similar to

the reset pin (pin 58) this bit clears at the end of a

power-on reset cycle or a system reset cycle

Bits 0 through 6 are not used by this memory card

but power up as zeroes for PCMCIA compatibility

10

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