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IMC002FLSA 데이터 시트보기 (PDF) - Intel

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IMC002FLSA Datasheet PDF : 39 Pages
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SERIES 2 FLASH MEMORY CARDS
APPLICATIONS
Intel’s second generation Series 2 Flash Memory
Cards facilitate high performance disk emulation for
the storage of data files and application programs on
a purely solid-state removable medium File man-
agement software Flash Translation Layer (FTL) in
conjunction with the Series 2 Flash Memory Cards
enable the design of high-performance light-weight
notebook palmtop and pen-based PCs that have
the processing power of today’s desktop computers
Application software stored on the flash memory
card substantially reduces the slow disk-to-DRAM
download process Replacing the mechanical disk
results in a dramatic enhancement of read perform-
ance and substantial reduction of power consump-
tion size and weight considerations particularly
important in portable PCs and equipment The Se-
ries 2 Card’s high performance read access time al-
lows the use of Series 2 Cards in an ‘‘execute-in-
place’’ (XIP) architecture XIP eliminates redundancy
associated with DRAM Disk memory system archi-
tectures Operating systems stored in Flash Memory
decreases system boot or program load times en-
abling the design of PCs that boot operate store
data files and execute application programs from to
nonvolatile memory without losing the ability to per-
form an update
File management systems modify and store data
files by allocating flash memory space intelligently
Wear leveling algorithms employed to equally dis-
tribute the number of rewrite cycles ensure that no
particular block is cycled excessively relative to oth-
er blocks This provides hundreds of thousands of
hours of power on usage
This file management software enables the user to
interact with the flash memory card in precisely the
same way as a magnetic disk
Series 2 Flash Memory Cards provide durable non-
volatile memory storage for mobile PCs on the road
facilitating simple transfer back into the desktop en-
vironment
For systems currently using a static RAM battery
configuration for data acquisition the Series 2 Flash
Memory Card’s nonvolatility eliminates the need for
battery backup The concern for battery failure no
longer exists an important consideration for porta-
ble computers and medical instruments both requir-
ing continuous operation Series 2 Cards consume
no power when the system is off and only 60 mA in
Deep-Sleep mode (2 Megabyte card) Furthermore
Flash Memory Cards offer a considerable cost and
density advantage over memory cards based on
static RAM with battery backup
Besides disk emulation the Series 2 Card’s electri-
cal block-erasure data writability and inherent non-
volatility fit well with data accumulation and record-
ing needs Electrical block-erasure provides design
flexibility to selectively rewrite blocks of data while
saving other blocks for infrequently updated param-
eters and lookup tables For example networks and
systems that utilize large banks of battery-backed
DRAM to store configuration and status benefit from
the Series 2 Flash Card’s nonvolatility and reliability
SERIES 2 ARCHITECTURE
OVERVIEW
The Series 2 Flash Memory Card contains a 2 to 20
Megabyte Flash Memory array consisting of 2 to 20
28F008SA FlashFile Memory devices Each
28F008SA contains sixteen individually-erasable 64
Kbyte blocks therefore the Flash Memory Card
contains from 32 to 320 device blocks It also con-
tains two Card Control Logic devices that manage
the external interface address decoding and com-
ponent management logic (Refer to Figure 1 for a
block diagram )
To support PCMCIA-compatible word-wide access
devices are paired so that each accessible memory
block is 64 KWords (see Figure 2) Card logic allows
the system to write or read one word at a time or
one byte at a time by referencing the high or low
byte Erasure can be performed on the entire block
pair (high and low device blocks simultaneously) or
on the high or low byte portion separately
Also in accordance with PCMCIA specifications this
product supports byte-wide operation in which the
flash array is divided into 128K x 8 bit device blocks
In this configuration odd bytes are multiplexed onto
the low byte data bus
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