IS42S16400-7T 데이터 시트보기 (PDF) - Integrated Circuit Solution Inc
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IS42S16400-7T
Integrated Circuit Solution Inc
IS42S16400-7T Datasheet PDF : 54 Pages
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IS42S8800/IS42S8800L
IS42S16400/IS42S16400L
CKE RELATED COMMAND TRUTH TABLE(1)
Current State
Operation
CKE
n-1 n CS RAS CAS WE Address
Self-Refresh (S.R.)
Self-Refresh Recovery
Power-Down (P.D.)
Both Banks Idle
Any state
other than
listed above
INVALID, CLK (n - 1)would exit S.R.
Self-Refresh Recovery(2)
Self-Refresh Recovery(2)
Illegal
Illegal
Maintain S.R.
Idle After tRC
Idle After tRC
Illegal
Illegal
Begin clock suspend next cycle(5)
Begin clock suspend next cycle(5)
Illegal
Illegal
Exit clock suspend next cycle(2)
Maintain clock suspend
INVALID, CLK (n - 1) would exit P.D.
EXIT P.D. -> Idle(2)
Maintain power down mode
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Auto-Refresh
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Self-Refresh(3)
Refer to operations in Operative Command Table
Power-Down(3)
Refer to operations in Operative Command Table
Begin clock suspend next cycle(4)
Exit clock suspend next cycle
Maintain clock suspend
H X X X X XX
L H H X X XX
L H L H H XX
L H L H L XX
L H L L X XX
L L X X X XX
H H H X X XX
H H L H H XX
H H L H L XX
H H L L X XX
H L H X X XX
H L L H H XX
H L L H L XX
H L L L X XX
L H X X X XX
L L X X X XX
H X X X X X
L H X X X XX
L L X X X XX
H H H X X X
H H L H X X
H H L L H X
H H L L L HX
H H L L L L Op - Code
H L H X X X
H L L H X X
H L L L H X
H L L L L HX
H L L L L L Op - Code
L X X X X XX
H H X X X XX
H L X X X XX
L H X X X XX
L L X X X XX
Notes:
1. H : Hight level, L : low level, X : High or low level (Dont care).
2. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup time must be satisfied
before any command other than EXIT.
3. Power down and Self refresh can be entered only from the both banks idle state.
4. Must be legal command as defined in Operative Command Table.
5. Illegal if tSREX is not satisfied.
14
Integrated Circuit Solution Inc.
DR007-0A
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