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ISL12008 데이터 시트보기 (PDF) - Intersil
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ISL12008
I2C Real Time Clock with Battery Backup
Intersil
ISL12008 Datasheet PDF : 19 Pages
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ISL12008
SDA vs SCL Timing
t
F
t
HIGH
t
LOW
t
R
SCL
t
SU:STA
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
t
SU:DAT
t
HD:STA
t
HD:DAT
t
AA
t
DH
Symbol Table
WAVEFORM
INPUTS
Must be steady
OUTPUTS
Will be steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes Allowed
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not Known
N/A
Center Line is
High Impedance
t
SU:STO
t
BUF
5
FN6690.1
September 26, 2008
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