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KK82C55 데이터 시트보기 (PDF) - Kodenshi Auk Co., LTD

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KK82C55
Kodenshi
Kodenshi Auk Co., LTD Kodenshi
KK82C55 Datasheet PDF : 22 Pages
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KK82C55A
OTHER TIMINGS
Symbol
Parameter
tWB
WR = 1 to Output
tlR
Peripheral Data Before RD
tHR Peripheral Data After RD
tAK
ACK Pulse Width
tST
STB Pulse Width
tPS
Per. Data Before STB High
tPH Per. Data After STB High
tAD
ACK = 0 to Output
tKD
ACK = 1 to Output Float
tWOB WR = 1 to OBF = 0
tAOB
ACK = 0 to OBF = 1
tSIB
STB = 0 to IBF = 1
tRIB
RD = 1 to IBF = 0
tRIT
RD = 0 to INTR = 0
tSIT
STB = 1 to INTR = 1
tAIT
ACK = 1 to INTR = 1
tWIT WR = 0 to INTR = 0
tRES Reset Pulse Width
Min Max Units Test Conditions
350
ns
0
ns
0
ns
200
ns
100
ns
20
ns
50
ns
175
ns
20 250
ns
150
ns
150
ns
150
ns
150
ns
200
ns
150
ns
150
ns
200
ns see note1
500
ns see note2
NOTE
1. INTR_ may occur as early as WR _.
2. Pulse width of initial Reset pulse after power on must be at least 50µSec. Subsequent Reset pulses may be 500ns
minimum. The output Ports A B or C may glitch low during the reset pulse but all port pins will be held at a logic
“one” level after the reset pulse.
WRITE TIMING
A0-1,CS
tAW
tWA
DATA BUS
tDW
tWD
WR
tWW
20

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