LH530800AN-Y 데이터 시트보기 (PDF) - Sharp Electronics

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LH530800AN-Y

CMOS 1M (128K × 8) 3 V-Drive MROM

Sharp Electronics 

LH530800A-Y CMOS 1M (128K × 8) 3 V-Drive MROM

FEATURES

• 131,072 words × 8 bit organization

• Access times:

500 ns (MAX.) at 2.6 V ≤ VCC < 4.5 V

150 ns (MAX.) at 4.5 V ≤ VCC ≤ 5.5 V

• Low-power consumption:

Operating: 193 mW (MAX.)

Standby: 550 µW (MAX.)

• Static operation

• Three-state outputs

• Mask-programmable control pin:

Pin 24 = OE/OE

• Wide range power supply:

2.6 V to 5.5 V

• Packages:

32-pin, 600-mil DIP

32-pin, 525-mil SOP

DESCRIPTION

The LH530800A-Y is a 1M-bit mask-programmable

ROM organized as 131,072 × 8 bits. It is fabricated

using silicon-gate CMOS process technology.

PIN CONNECTIONS

32-PIN DIP

32-PIN SOP

NC 1

A16 2

A15 3

A12 4

A7 5

A6 6

A5 7

A4 8

A3 9

A2 10

A1 11

A0 12

D0 13

D1 14

D2 15

GND 16

TOP VIEW

32 Vcc

31 NC

30 NC

29 A14

28 A13

27 A8

26 A9

25 A11

24 OE/OE

23 A10

22 CE

21 D7

20 D6

19 D5

18 D4

17 D3

530800A-Y-1

Figure 1. Pin Connections for DIP and

SOP Packages

1

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