MAX3510 데이터 시트보기 (PDF) - Maxim Integrated
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MAX3510 Datasheet PDF : 12 Pages
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Table 1. Reflection Coefficients (75Ω reference)
FREQUENCY
TRANSMIT MODE
TRANSMIT MODE
MHz
1
REAL S11
0.937
IMAG S11
-0.006
REAL S22
-0.494
IMAG S22
0.625
2
0.937
-0.007
-0.054
0.550
5
0.936
-0.005
0.196
0.199
10
0.932
-0.011
0.183
0.017
20
0.932
-0.018
0.143
-0.081
30
0.932
-0.026
0.108
-0.149
40
0.927
-0.033
0.059
-0.199
60
0.922
-0.054
-0.060
-0.257
80
0.913
-0.075
-0.197
-0.252
120
0.889
-0.145
-0.420
-0.070
160
0.850
-0.249
-0.442
0.256
200
0.753
-0.408
-0.212
0.543
TRANSMIT DISABLE MODE
REAL S22
IMAG S22
-0.509
0.623
-0.075
0.577
0.219
0.257
0.244
0.062
0.219
-0.052
0.194
-0.121
0.158
-0.175
0.066
-0.252
-0.049
-0.284
-0.281
-0.207
-0.409
0.037
-0.327
0.345
PIN
1, 3,
7, 11
2
4
5
6
8
9
10
12
13
14
15
16
17
18
19
20
NAME
GND
VCC1
GND1
VIN+
VIN-
CS
SDA
SCLK
SHDN
N.C.
CEXT2
VOUT-
VOUT+
CEXT1
TXEN
VCC2
GND2
Pin Description
FUNCTION
Ground Pins
Programmable-Gain Amplifier (PGA) +5V Supply. Bypass this pin to GND1 with a decoupling capacitor as
close to the part as possible.
PGA RF Ground. As with all ground connections, maintain the shortest possible (low-inductance) length to
the ground plane.
Positive PGA Input. Along with VIN-, this port forms a high-impedance differential input to the PGA. Driving
this port differentially will increase the rejection of second-order distortion at low output levels.
Negative PGA Input. When not used, this port must be AC-coupled to ground. See VIN+.
Serial-Interface Enable. TTL-compatible input. See the Serial Interface section.
Serial-Interface Data. TTL-compatible input. See the Serial Interface section.
Serial-Interface Clock. TTL-compatible input. See the Serial Interface section.
Shutdown. When this pin and TXEN (pin 18) are set low, all functions (including the serial interface) are dis-
abled, leaving only leakage currents to flow.
No Connection
RF Output Bypass. This pin must be bypassed to ground with a 0.1µF capacitor.
Negative Output. Along with VOUT+, this port forms a 300Ω impedance output. This port is matched to a
75Ω load using a 2:1 transformer.
Positive Output. See VOUT-.
Transmit-Disable (Enable) Timing Capacitor. See the Ramp Generator section.
Power-Amplifier Enable. Setting this pin low shuts off the power amplifier.
Power Amplifier Bias, +5V Supply. Bypass this pin to GND2 with a decoupling capacitor as close to the part
as possible.
Power Amplifier Bias Ground. As with all ground connections, maintain the shortest possible (low induc-
tance) length to the ground plane.
6 _______________________________________________________________________________________
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