MAX3656 데이터 시트보기 (PDF) - Maxim Integrated

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MAX3656

155Mbps to 2.5Gbps Burst-Mode Laser Driver

Maxim Integrated 

155Mbps to 2.5Gbps Burst-Mode

Laser Driver

Detailed Description

The MAX3656 laser driver has three main parts: a high-

speed modulator, a high-speed bias driver, and a laser-

biasing block with automatic power control (see the

Functional Diagram). Both the bias and modulation output

stages are composed of differential pairs with program-

mable current sources. The circuit design is optimized for

high-speed, low-voltage (3.3V), DC-coupled operation.

The device is ideal for burst-mode operation with turn-on

and turn-off times less than 2ns. The MAX3656 can be

configured for nonburst-mode applications (continuous

mode) by connecting BEN high.

The MAX3656 modulation output is optimized for dri-

ving a 15Ω load. The modulation current can swing up

to 85mA for data rates less than or equal to 1.25Gbps

and up to 60mA for data rates greater than 1.25Gbps

when the laser is DC-coupled. To interface with the

laser diode, a damping resistor (RD) is required for

impedance matching. The combined resistance due to

the series damping resistor and the equivalent series

resistance (ESR) of the laser diode should be equal to

15Ω. The OUT- pin should be connected with a 15Ω

resistor to VCC. To reduce optical output aberrations

and duty-cycle distortion caused by laser diode para-

sitic inductance, an RC shunt network is necessary.

The currents in the BIAS output switch at high speeds

when bursting. Therefore, the BIAS+ pin should be con-

nected directly through a resistor to the cathode of the

laser. The BIAS- pin should be connected to VCC

through a 15Ω resistor.

Automatic Power Control

To maintain constant average optical power, the

MAX3656 incorporates a digital automatic power-con-

trol (APC) loop to compensate for the changes in laser

threshold current over temperature and lifetime. A

back-facet photodiode mounted in the laser package

converts the optical power into a photocurrent. The

APC loop adjusts the laser bias current so the monitor

current is matched to a reference current set by RAPCSET.

At startup, the APC loop traverses through a pseudo-

binary search algorithm to set the proper monitor current

that translates to the proper bias current. When BEN is

high, the APC loop maintains constant optical power by

digitally controlling the bias current. When BEN is low,

the APC loop digitally stores the bias current value of the

previous burst. The APC loop is reset in two ways, either

power cycling or toggling the EN pin.

An external resistor (RBIASMAX) sets the maximum allow-

able bias current during closed-loop operation and sets

the bias current during open-loop operation. An APC fail-

ure flag (FAIL) is set low during initialization and when

the bias current cannot be adjusted to achieve the

desired average optical power.

APC closed-loop operation requires that the user set

three currents with external resistors connected between

GND, BIASMAX, MODSET, and APCSET pins. Detailed

guidelines for these resistor settings are described in the

Design Procedure section.

If necessary, the MAX3656 is fully operational without

APC. To operate the MAX3656 open loop, connect a

50kΩ resistor from APCSET to ground and leave the

MD pin unconnected. In this case, two external resis-

tors connected from BIASMAX and MODSET to GND

directly set the laser current.

APC Failure Monitor

The MAX3656 provides an APC failure monitor (TTL) to

indicate an APC loop-tracking failure. FAIL is set low

when the APC loop cannot adjust the bias current to

maintain the desired monitor current. For example, the

laser diode requires more bias current (to maintain a

constant optical output) than maximum bias current set

by RBIASMAX. The bias current is limited and FAIL is

asserted. In an alternate example, assume that a circuit

failure causes the cathode of the laser diode to be short-

ed to GND, thereby causing an uncontrolled high optical

output. In this case, the APC loop cannot decrease the

user current, and FAIL is asserted. FAIL is also set low

during initialization.

Slow-Start

For safety reasons, at initial power-up or after toggling

EN, the MAX3656 incorporates a slow-start circuit that

provides a typical delay of 450ns during the beginning

of APC loop initialization.

Enable Control

The MAX3656 features a chip-enable function. When

EN is high, the bias and modulation currents are off and

the digital state of the APC loop is reset. When EN is

toggled from a high to a low, the APC loop begins ini-

tialization. The initialization time is typically 2.1µs

(LONGB = low) and 3.72µs (LONGB = high).

APC Loop Initialization

The digital APC loop is reset whenever the power is

turned off and/or the EN input is driven high. When

power is turned on or when EN is toggled low, the APC

loop automatically performs an initialization routine that

quickly adjusts the bias current from its reset level to its

initialized level. The initialized bias current level is

defined to be within 3.8mA of the final bias current level

set by the APCSET resistor. Once initialized, the APC

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