MAX3885 데이터 시트보기 (PDF) - Maxim Integrated
부품명
상세내역
제조사
MAX3885 Datasheet PDF : 8 Pages
| |||
19-4767; Rev 4; 12/07
EVAALVUAAILTAIOBNLEKIT
+3.3V, 2.488Gbps, SDH/SONET
1:16 Deserializer with LVDS Outputs
General Description
The MAX3885 deserializer is ideal for converting
2.488Gbps serial data to 16-bit wide, 155Mbps parallel
data in SDH/SONET applications. Operating from a sin-
gle +3.3V supply, this device accepts PECL serial
clock and data inputs, and delivers low-voltage differ-
ential-signal (LVDS) clock and data outputs for interfac-
ing with high-speed digital circuitry. It also provides an
LVDS synchronization input that enables data realign-
ment and reframing. The MAX3885 is available in the
extended temperature range (-40°C to +85°C) in a 64-
pin TQFP package.
Applications
2.488Gbps SDH/SONET Transmission Systems
Add/Drop Multiplexers
Digital Cross Connects
Pin Configuration appears at end of data sheet.
Features
♦ Single +3.3V Supply
♦ 2.488Gbps Serial to 155Mbps Parallel Conversion
♦ 660mW Operating Power
♦ LVDS Data Outputs and Synchronization Inputs
♦ Self-Biasing PECL Inputs Ease AC Coupling
♦ Synchronization Inputs for Data Realignment and
Reframing
Ordering Information
PART
TEMP RANGE
MAX3885ECB
-40°C to +85°C
MAX3885ECB+
-40°C to +85°C
+Denotes a lead-free package.
PIN-PACKAGE
64 TQFP
64 TQFP
Typical Operating Circuit
SERIAL DATA
INPUTS
VCC = +3.3V
MAX3875
DATA
AND
CLOCK
RECOVERY
VCC = +3.3V
VCC = +3.3V
VCC
133Ω
133Ω
PD15+
86.6Ω
86.6Ω
SD+
SD-
MAX3885
PD15-
PD0+
100Ω*
•
•
•
VCC = +3.3V
133Ω
133Ω
100Ω*
PD0-
PCLK+
86.6Ω
SCLK+
SCLK-
86.6Ω
100Ω*
PCLK-
SYNC+
SYNC-
GND
OVERHEAD
TERMINATION
*REQUIRED ONLY IF OVERHEAD CIRCUIT DOES NOT INCLUDE INTERNAL INPUT TERMINATION.
THIS SYMBOL REPRESENTS A TRANSMISSION LINE OF CHARACTERISTIC IMPEDANCE Z0 = 50Ω.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Share Link: 