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MAX6638ATC 데이터 시트보기 (PDF) - Maxim Integrated

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MAX6638ATC Datasheet PDF : 19 Pages
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Temperature Monitor with
Dual Serial Interface
SMBus1 CRC1 = 06h
SMBus2 CRC2 = 05h
ACTUAL DATA
READY FROM
ADC CONVERSIONS
ACTUAL DATA READ
BY SMBus2
SMBus1 START
TIME
CONVERSION
250
500
750
1000
1250
1500
1750
2000 (ms)
CYCLE
CYCLE
CYCLE
CYCLE
CYCLE
CYCLE
CYCLE
CYCLE
CYCLE
SMBus1 DATA AVAILABLE
CYCLE
CYCLE
CYCLE
CYCLE
SMBus2 START
CONVERSION
SHADED BOXES INDICATE EXPECTED ADC CONVERSION CYCLING AND DATA READINGS OF SMBus2 FROM START CONVERSION
Figure 3. An Example of ADC Cycling for Two Conversion Rates Set by Each Controllers on SMBus1 and SMBus2
The MAX6638 allows conversion rates that are 2x multi-
ples of the minimum rate of 0.0625Hz. Figure 2 shows
several different conversion rate settings.
The ADC converts at the higher rate of the two conver-
sions set by SMBus1 and SMBus2 controllers. The con-
troller that sets the higher rate receives a new
conversion at the higher conversion-rate time. The con-
troller that sets the lower rate receives the most recent
conversion result at the lower conversion-rate timing.
Figure 3 shows an example of this. SMBus1 initiates the
ADC converter by selecting conversion rate 06h (4Hz)
prior to SMBus2 initiating a conversion. Then SMBus2
initiates conversions of 05h (2Hz) independent of the
process initiated by SMBus1. The controller accesses
data at its programmed time set by the initiated conver-
sion time. The data presented to SMBus2 is always
ready at the anticipated time, but the data is actually
the result of a previous conversion sequence driven by
the higher conversion rate set by SMBus1.
The first SMBus channel that activates a conversion
sequence always establishes the MAX6638 conversion
cycling. The ADC conversion rates increase and
decrease as set by each of the SMBus controllers with
the higher conversion rate always dominating.
Increasing the conversion rate with the ADC cycling
increases the rate the MAX6638 performs cycles with-
out losing sync of the previously established cycle tim-
ing. A decrease in conversion rate reduces the ADC
cycling to the lower rate without losing sync with the
previously set cycle pattern. The ADC cycling pattern is
only reset following a POR event or upon exiting the
standby mode through one of the SMBus controllers’
initiation of cycling or single-shot conversion.
Low-Power Standby Mode
Standby mode reduces the supply current to 3µA (typ)
by disabling the ADC and timing circuitry when both
SMBus controller channels enable standby mode.
Standby mode is enabled only when both SMBus con-
trollers request standby mode. Set each of the RUN bits
to 1 in each corresponding configuration register (see
Tables 3 and 5) to enter standby mode. When one
SMBus controller channel is set to standby mode, the
other conversion rate is automatically set to the active
channel’s conversion rate and mode. The MAX6638
retains all data in the registers and each SMBus inter-
face is active and listening for SMBus commands.
Standby mode is not a shutdown mode. With activity on
either SMBus, the device draws more supply current
(see the Typical Operating Characteristics). In standby
mode, the MAX6638 performs an ADC conversion
sequence through the one-shot command, regardless
of either of the RUN bit statuses, upon receipt of a one-
shot command from either SMBus controller.
If the device receives standby commands from both
SMBus controllers during a conversion, the conversion
cycle truncates, and the data from that conversion is
not latched into a temperature register. The previous
data does not change and remains available.
Supply current drawn during the 32ms conversion period
is 800µA (typ). Slowing down the conversion rate reduces
the average supply current (see the Typical Operating
Characteristics). Between conversions, the conversion
rate timer consumes 40µA (typ) of supply current.
SMBus Interface
From a software perspective, the MAX6638 appears as a
set of byte-wide registers that contain temperature data,
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