Q67100-H3509 데이터 시트보기 (PDF) - Infineon Technologies

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Q67100-H3509

8/16 Kbit (1024/2048 × 8 bit) Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus and Page Protection Mode™

Infineon Technologies 

SLx 24C08/16/P

3

I2C-Bus Characteristics

The SLx 24C08/16/P devices support a master/slave bidirectional bus oriented protocol

in which the EEPROM always takes the role of a slave.

Master

SCL

SDA

Slave 1

Slave 5

Slave 2

Slave 6

Slave 3

Slave 7

VCC

Slave 4

Slave 8

VCC

IES02183

Figure 3

Bus Configuration

Master

Device that initiates the transfer of data and provides the clock for both

transmit and receive operations.

Slave

Device addressed by the master, capable of receiving and transmitting

data.

Transmitter The device with the SDA as output is defined as the transmitter. Due to

the open drain characteristic of the SDA output the device applying a low

level wins.

Receiver The device with the SDA as input is defined as the receiver.

Semiconductor Group

7

1998-07-27

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