MAX9949 데이터 시트보기 (PDF) - Maxim Integrated
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MAX9949 Datasheet PDF : 23 Pages
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Dual Per-Pin Parametric Measurement Units
Pin Description (continued)
PIN
MAX9950 MAX9949
58
23
59
22
60
21
61
20
62
19
63
18
64
17
—
—
NAME
FUNCTION
MSRB
PMU-B Measurement Output. Provides a voltage equal to the SENSE voltage in FIMV mode
and provides a voltage proportional to the DUT current in FVMI mode for PMU-B. Force HI-ZB
low to place MSRB in a high-impedance state.
IN1B
Input Voltage 1 for PMU-B. Sets the forced voltage in FV mode or the forced current in FI
mode for PMU-B.
IN0B
Input Voltage 0 for PMU-B. Sets the forced current in FI mode or the forced voltage in FI mode
for PMU-B.
CLLOB PMU-B Lower-Clamp Voltage Input. Sets the lower clamp voltage level for PMU-B.
CLHIB PMU-B Upper-Clamp Voltage Input. Sets the upper clamp voltage level for PMU-B.
THMINB
PMU-B Window-Comparator Lower Threshold Voltage Input. Sets the lower voltage threshold
for the PMU-B window comparator.
THMAXB
PMU-B Window-Comparator Upper Threshold Voltage Input. Sets the upper voltage threshold
for the PMU-B window comparator.
EP Exposed Pad. Internally connected to VEE. Connect to VEE power plane.
Detailed Description
The MAX9949/MAX9950 force or measure voltages in
the -2V to +7V through -7V to +13V ranges, dependent
upon the supply voltage range (VCC and VEE).
However, the devices can handle supply voltages up to
+30V (VCC to VEE) and a 20V DUT voltage swing at full
current. The MAX9949/MAX9950 PMU also force or
measure currents up to ±25mA, with a lowest full-scale
range of ±2µA. Use an external buffer amplifier for cur-
rent ranges greater than ±25mA.
The MSR_ output presents a voltage proportional to the
measured voltage or current. Place MSR_ in a low-leak-
age, high-impedance state by pulling HI-Z_ low.
Integrated comparators with externally programmable
voltage thresholds provide “too low” (DUTL_) and “too
high” (DUTH_) voltage-monitoring outputs. Each com-
parator output features a selectable high-impedance
state. The devices feature separate FORCE_ and
SENSE_ connections and are fully protected against
short circuits. The FORCE_ output has two voltage
clamps, negative (CLLO_) and positive (CLHI_), to limit
the voltage to externally provided levels. Two control
voltage inputs, selected independently of the PMU
mode, allow for greater flexibility.
Serial Interface
The MAX9949/MAX9950 use a standard 3-wire
SPI™/QSPI™/MICROWIRE™-compatible serial port.
Once the input data register fills, the data becomes avail-
able at DOUT. This data output allows for daisy-chaining
multiple devices. Figures 1, 2, and 3 show the serial
interface timing diagrams.
Serial Port Speed
The serial port timing specifications are measured at a
logic supply voltage (VL) of +3.0V, ensuring operation
of the serial port at rated speed for VL from +3.0V to
+5.5V.
The serial interface has two ranks. Each PMU has an
input register that loads from the serial port shift register.
Each PMU also has a PMU register that loads from the
input register. Data does not affect the PMU until it reach-
es the PMU register. This register configuration permits
loading of the PMU data into the input register at one time
and then latching the input register data into the PMU
register later, at which time the PMU function changes
accordingly. The register configuration also provides the
ability to change the state of the PMU asynchronously
with respect to the loading of that PMU’s data into the ser-
ial port. Thus, the PMU easily updates simultaneously with
other PMUs or other devices.
Use the LOAD input to asynchronously load all input
registers into the PMU registers. If LOAD remains low
when data latches into an input register, the data also
transfers to the PMU register.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor, Corp.
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