MB39A113 데이터 시트보기 (PDF) - Fujitsu
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MB39A113 Datasheet PDF : 51 Pages
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MB39A113
s PIN DESCRIPTION
Pin No.
1
2
3
4
Symbol
−INC2
OUTC2
+ INE2
−INE2
5
CVM
6
VREF
7
FB12
8
−INE1
9
+ INE1
10
OUTC1
11
OUTD
12
−INC1
13
+ INC1
14
CTL
15
FB3
16
−INE3
17
RT
18
OVP
19
VH
20
OUT
21
VCC
22
CS
23
GND
24
+ INC2
I/O
Description
I
Current detection amplifier (Current Amp2) inverted input terminal
O
Current detection amplifier (Current Amp2) output terminal
I
Error amplifier (Error Amp2) non-inverted input terminal
I
Error amplifier (Error Amp2) inverted input terminal
O
Open drain type output terminal of constant-voltage control state
detection comparator (CV Comp.)
O
Reference voltage output terminal
O
Error amplifier (Error Amp1, Error Amp2) output terminal
I
Error amplifier (Error Amp1) inverted input terminal
I
Error amplifier (Error Amp1) non-inverted input terminal
O
Current detection amplifier (Current Amp1) output terminal
With IC in standby mode, this terminal is set to Hi-Z to prevent loss of
O
current through output voltage setting resistance.
CTL terminal : Output “L” level at “H” level
I
Current detection amplifier (Current Amp1) inverted input terminal
I
Current detection amplifier (Current Amp1) non-inverted input terminal
I
Power supply control terminal
Setting the CTL terminal at “L” level places the IC in the standby mode.
O
Error amplifier (Error Amp3) output terminal
I
Error amplifier (Error Amp3) inverted input terminal
Triangular wave oscillation frequency setting resistor connection
terminal
O
Open drain type output terminal of overvoltage detection comparator
(OVComp.)
O
Power supply terminal for FET drive circuit. (VH = VCC−6 V)
O
External FET gate drive terminal.
Power supply terminal for reference power supply control circuit and
output circuit
Soft-start capacitor connection terminal
Ground terminal
I
Current detection amplifier (Current Amp2) non-inverted input terminal
4
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