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MC14LC5447P 데이터 시트보기 (PDF) - Motorola => Freescale

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MC14LC5447P Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
APPLICATION CIRCUIT
500 pF
MC14LC5447
TIP
C1
C3 10 k
VDD
0.1 µF
PROTECTION
NETWORK
RING
C2
1N4004x4
500 pF
C4 10 k
470 k
18 k
TI 1 16 15 DOC
RI 2
14 DOR
RDI1 3
13 CDO
RDI2 4
12 RDO
NC 5
11 CLKSIN
RT 6
PWRUP 7
10 OSCin
8
9 OSCout
3.579 MHz
15 k
+5 V
NOTE: C1 and C2 0.2 µF required for line
isolation. C1 through C4 are 250 V min,
non–polarized.
270 k
0.2 µF
+5 V
30 pF
4.7 M
10 M
0.33 µF
VDD
30 pF
TO PC
TO PC
MC145407
Figure 7. Partial Implementation of PC Interface to Tip and Ring
FIRST RING
0.5
2 SECONDS
SEC
0.5
SECOND RING
SEC
2 SECONDS
RI
0101 1
DATA
RT
RDO
PWRUP
CDO
NOTE 1
NOTE 1
NOTE 2
NOTE 3
DOR
DATA
DOC
DATA
OSC
3.58 MHz, 3.6864, OR 455 kHz
NOTES:
1. Wired ‘OR’ RDO with CDO.
2. Overlap of RDO edge with CDO edge to ensure part stays in PWRUP determined by RC time constant on RDO, PWRUP,
and CDO pin.
3. Part reverts to PWR ON, on rising edge of RDO since there is no CDO.
Timing Diagram for Figure 7
MC14LC5447
8
MOTOROLA

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