T35L6432A 데이터 시트보기 (PDF) - Taiwan Memory Technology
부품명
상세내역
제조사
T35L6432A Datasheet PDF : 15 Pages
| |||
tm TE
CH
T35L6432A
INTERLEAVED BURST ADDRESS TABLE (MODE = NC/VCC)
First Address
(external)
A...A00
A...A01
A...A10
A...A11
Second Address
(internal)
A...A01
A...A00
A...A11
A...A10
Third Address
(internal)
A...A10
A...A11
A...A00
A...A01
Fourth Address
(internal)
A...A11
A...A10
A...A01
A...A00
LINEAR BURST ADDRESS TABLE (MODE = GND)
First Address
(external)
A...A00
A...A01
A...A10
A...A11
Second Address
(internal)
A...A01
A...A10
A...A11
A...A00
Third Address
(internal)
A...A10
A...A11
A...A00
A...A01
Fourth Address
(internal)
A...A11
A...A00
A...A01
A...A10
PARTIAL TRUTH TABLE FOR READ/WRITE
Function
READ
READ
WRITE one byte
WRITE all byte
WRITE all byte
GW
BWE
BW1
BW2
H
H
X
X
H
L
H
H
H
L
L
H
H
L
L
L
L
X
X
X
BW3
X
H
H
L
X
BW4
X
H
H
L
X
WRITE PASS-THROUGH TRUTH TABLE
PREVIOUS CYCLE
PRESENT CYCLE
NEXT CYCLE
OPERATION
BWn
OPERATION
Initiate WRITE cycle, all bytes All L2,3 Initiate READ cycle
CE BWn OE OPERATION
L H L Read D(n)
Address= A(n-1), data= D(n-1)
Register A(n), Q= D(n-1)
Initiate WRITE cycle, all bytes All L2,3 No new cycle
H H L No carry-over from
Address= A(n-1), data= D(n-1)
Q = D(n-1)
previous cycle
Initiate WRITE cycle, all bytes All L2,3 No new cycle
H H H No carry-over from
Address= A(n-1), data= D(n-1)
Q = HIGH-Z
previous cycle
Initiate WRITE cycle, one bytes ONE L2 No new cycle
H H L No carry-over from
Address= A(n-1), data= D(n-1)
Q = D(n-1) for one byte
previous cycle
Note: 1. Previous cycle may be any cycle(non-burst, burst, or wait).
2. BWE is LOW for individual byte WRITE.
3. GW = LOW yields the same result for all-byte WRITE operation.
Taiwan Memory Technology, Inc. reserves the right P. 5
to change products or specifications without notice.
Publication Date: DEC. 1998
Revision:A
Share Link: 