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MT48LC32M8A2P-7ELIT(2005) 데이터 시트보기 (PDF) - Micron Technology

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MT48LC32M8A2P-7ELIT
(Rev.:2005)
Micron
Micron Technology Micron
MT48LC32M8A2P-7ELIT Datasheet PDF : 61 Pages
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Table of Contents
Functional Block Diagram – 64 Meg x 4 .................... 6
Functional Block Diagram – 32 Meg x 8 .................... 7
Functional Block Diagram – 16 Meg x 16 .................. 8
Pin Descriptions .......................................................... 10
Ball Descriptions .......................................................... 10
Functional Description ............................................... 12
Initialization ........................................................... 12
Register Definition ................................................ 12
Mode Register ................................................... 12
Burst Length ................................................ 12
Burst Type ................................................... 13
CAS Latency ................................................ 14
Operating Mode .......................................... 14
Write Burst Mode ........................................ 14
Commands ................................................................... 15
TruthTable1(CommandsandDQMOperation) .............. 15
Command Inhibit .................................................. 16
No Operation (NOP) .............................................. 16
Load mode register ................................................ 16
Active ....................................................................... 16
Read ....................................................................... 16
Write ....................................................................... 16
Precharge ................................................................ 16
Auto Precharge ....................................................... 16
Burst Terminate ..................................................... 17
Auto Refresh ........................................................... 17
Self Refresh ............................................................. 17
Operation ..................................................................... 18
Bank/Row Activation ............................................. 18
Reads ....................................................................... 19
Writes ....................................................................... 25
Precharge ................................................................ 27
Power-Down ........................................................... 27
Clock Suspend ........................................................ 28
Burst Read/Single Write ....................................... 28
256Mb: x4, x8, x16
SDRAM
Concurrent Auto Precharge ................................. 29
TruthTable2(CKE) ...................................................... 31
Truth Table 3 (Current State, Same Bank) ........................ 32
Truth Table 4 (Current State, Different Bank) .................. 34
Absolute Maximum Ratings ....................................... 36
DC Electrical Characteristics
and Operating Conditions ....................................... 36
IDD Specifications and Conditions ............................. 36
Capacitance .................................................................. 37
Electrical Characteristics
and Recommended AC Operating Conditions ....... 37
AC Electrical Characteristics (Timing Table) ......... 38
Timing Waveforms
Initialize and Load mode register ........................ 40
Power-Down Mode ................................................ 41
Clock Suspend Mode ............................................ 42
Auto Refresh Mode ................................................ 43
Self Refresh Mode .................................................. 44
Reads
Read – Without Auto Precharge ..................... 45
Read – With Auto Precharge ........................... 46
Single Read – Without Auto Precharge ......... 47
Single Read – With Auto Precharge ............... 48
Alternating Bank Read Accesses .................... 49
Read – Full-Page Burst .................................... 50
Read – DQM Operation ................................... 51
Writes
Write – Without Auto Precharge ..................... 52
Write – With Auto Precharge ........................... 53
Single Write - Without Auto Precharge ......... 54
Single Write - With Auto Precharge ................ 55
Alternating Bank Write Accesses ................... 56
Write – Full-Page Burst .................................... 57
Write – DQM Operation ................................... 58
PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8
256MSDRAM.pmd – Rev. H; Pub. 2/05
5
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©2003 Micron Technology, Inc. All rights reserved.

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