MT48LC16M16A2TG-6ALD(2007) 데이터 시트보기 (PDF) - Micron Technology

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MT48LC16M16A2TG-6ALD
(Rev.:2007)

256Mb: x4, x8, x16 SDRAM F

Micron Technology 

256Mb: x4, x8, x16 SDRAM

General Description

Figure 1:

SDRAMs offer substantial advances in DRAM operating performance, including the

ability to synchronously burst data at a high data rate with automatic column-address

generation, the ability to interleave between internal banks to hide precharge time, and

the capability to randomly change column addresses on each clock cycle during a burst

access.

64 Meg x 4 SDRAM Functional Block Diagram

CKE

CLK

CS#

WE#

CAS#

RAS#

CONTROL

LOGIC

BANK3

BANK2

BANK1

MODE REGISTER

12

A0–A12,

BA0, BA1

15 ADDRESS

REGISTER

REFRESH 13

COUNTER

ROW-

13

ADDRESS

MUX

13

BANK0

ROW-

ADDRESS

LATCH

&

DECODER

8,192

BANK0

MEMORY

ARRAY

(8,192 x 2,048 x 4)

SENSE AMPLIFIERS

8,192

2

BANK

CONTROL

LOGIC

2

COLUMN-

ADDRESS

11

11

COUNTER/

LATCH

I/O GATING

DQM MASK LOGIC

READ DATA LATCH

WRITE DRIVERS

2,048

(x4)

COLUMN

DECODER

1

1

DATA

4

OUTPUT

REGISTER

4

DATA

4

INPUT

REGISTER

DQM

DQ0-

DQ3

PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8

256MSDRAM_2.fm - Rev. L 10/07 EN

7

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©1999 Micron Technology, Inc. All rights reserved.

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