MX86250 데이터 시트보기 (PDF) - Macronix International

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MX86250

THE ADVANCED 64-BIT WINDOWS-95 AND DIRECTDRAW ACCELERATOR

Macronix International 

INDEX

MX86250

2.11 Pin Description

PCI Bus Interface Pins:

Pin Name

RSTB#

CPUCLK

FRAMEB

IRDYB

TRDYB

DEVSELB

STOPB

Pin No. Type Description

178 I

This input is PCI bus RESET#, it is an active low signal used to initialize the GUI

to a known state. The trailing edge of this input loads the power on strapping inputs

through MD0 to MD17. The power on strapping input pins each has an internally

weakly pulled down resistor (about 50K Ohm). If a power on reset input status "0"

is needed, then the corresponding pin doesn need an externally pulled up resistor.

If a power on reset input status "1"is needed, then the corresponding pin must be

pulled up by a 10K Ohm resistor.

167 I

This input is the PCI bus clock. It is an 1X clock of 33MHz.

173 I

This input is FRAME#, it is low to indicate the GUI that a valid address is present

on the PCI address bus and a New bus cycle or Burst bus cycles are starting.

When sampling this signal low, GUI would latch the address and bus commands.

170 I

This input is Initiator RDY#, it is generated from an PCI Bus Master. When it is

low, IRDYB indicates that the Initiator is able to complete the current bus

transaction if and only if the TRDY# is also low.

171 STO This output is Target RDY#, it is generated by GUI if the current bus cycle

belongs to the GUI. When it is low, TRDY# indicates that the GUI is able to

complete the current bus transaction which already targeted onto it if and only if

the IRDY# is also low. It remains low until this current cycle ends, then goes into

high for one PCI clock cycle, after that then goes into tri-state.

169 STO This output is DEVSEL#. When driven low, it indicates that GUI will respond to the

current cycle. It remains low until this current cycle ends, then goes into high for

one PCI clock cycle, after that then goes into tri- state.

172 STO This output is STOP#. When driven low, it indicates that GUI will request the

current bus master to stop the current bus transfer.

There are two configurations about this signal. One is called disconnect. Under

this configuration, GUI will complete the current transaction as the last one. In this

case, STOP# will be active at the same time that TRDY# is active. The other

configuration is called retry. In this case, GUI just request the bus master to

terminate the current cycle and retry again. TRDY# will not be generated in this

cycle. Once asserted, it remains low until this current cycle ends then goes into

high for one PCI clock cycle, after that then goes into tri-state.

P/N:PM0387

REV. 1.1, JUL 26, 1996

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