OR4E10 데이터 시트보기 (PDF) - Agere -> LSI Corporation

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OR4E10

ORCA® Series 4 Field-Programmable Gate Arrays

Agere -> LSI Corporation 

Preliminary Data Sheet

December 2000

Programmable Logic Cells (continued)

ORCA Series 4 FPGAs

F5D

K7_0

K7_1

K7_2

K7_3

K6_0

K6_1

K6_2

K6_3

K5_0

K5_1

K5_2

K5_3

LUT603

LUT647

K4_0

K4_1

K4_2

K4_3

F5C

DIN7

DIN6

DIN5

DIN4

DIN3

DIN2

DIN1

DIN0

CIN

F5B

K3_0

K3_1

K3_2

K3_3

K2_0

K2_1

K2_2

K2_3

PROGRAMMABLE

FUNCTION UNIT

(PFU)

Q7

Q6

Q5

Q4

Q3

Q2

Q1

Q0

COUT

REGCOUT

F7

F6

F5

F4

F3

F2

F1

F0

K1_0

K1_1

K1_2

K1_3

K0_0

K0_1

K0_2

K0_3

F5A

LSR[0:1] CLK[0:1] CE[0:1] SEL[0:1]

Figure 2. PFU Ports

5-5752(F)a

The PFU can be configured to operate in four modes: logic mode, half-logic mode, ripple mode, and memory (RAM/

ROM) mode. In addition, ripple mode has four submodes and RAM mode can be used in either a single- or dual-

port memory fashion. These submodes of operation are discussed in the following sections.

Lucent Technologies Inc.

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