MSM80C86A-10GS 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM80C86A-10GS

16-Bit CMOS MICROPROCESSOR

Oki Electric Industry 

¡ Semiconductor

MSM80C86A-10RS/GS/JS

INTA

INTERRUPT ACKNOWLEDGE: Output

This line is a read strobe signal for the interrupt acknowledge cycle. This line is active low.

ALE

ADDRESS LATCH ENABLE: Output

This line is used for latching the address into the MSM82C12 address latch. It is a positive

pulse and its trailing edge is used to strobe the address. This line is never floated.

DT/R

DATA TRANSMIT/RECEIVE: Output

This line is used to control the output enable of the bus transceiver.

When this line is high, the CPU transmits data, and when it is low. the CPU receives data.

This line is high impedance during hold acknowledge.

DEN

DATA ENABLE: Output

This line is used to control the output enable of the bus transceiver.

This line is active low. This line is high impedance during hold acknowledge.

HOLD

HOLD REQUEST: Input

This line is used for Bus Request from other devices.

This line is active high.

HLDA

HOLD ACKNOWLEDGE: Output

This line is used for Bus Grant other devices.

This line is active high.

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