PDM41024SA10SO 데이터 시트보기 (PDF) - Unspecified
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PDM41024SA10SO Datasheet PDF : 8 Pages
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Low VCC Data Retention Waveform
Data Retention Mode
V CC
VIH
CE1 VIL
VIH
CE2 VIL
t CDR
4.5V
VDR
VDR
≤ 0.2V
4.5V
tR
PDM41024
DON'T CARE
Data Retention Electrical Characteristics (LA Version Only) for JEDEC Version
Symbol Parameter
Test Conditions
Min. Typ. Max. Unit
VDR
ICCDR
VCC for Retention Data
Data Retention Current
2
CE1 ≥ VCC – 0.2V or VCC = 2V
—
CE2 ≤ VSS + 0.2V
VIN ≥ VCC – 0.2V
VCC = 3V
—
or ≤ 0.2V
—
—
V
—
500 µA
—
750 µA
tCDR
tR(3)
Chip Deselect to Data Retention Time
Operation Recovery Time
0
—
—
ns
tRC
—
—
ns
NOTES: (For three previous Electrical Characteristics tables)
1. The parameter is tested with CL = 5 pF as shown in Figure 2. Transition is measured ±200 mV from steady state voltage.
2. At any given temperature and voltage condition, tHZCE is less than tLZCE.
3. This parameter is sampled.
4. WE is high for a READ cycle.
5. The device is continuously selected. All the Chip Enables are held in their active state.
6. The address is valid prior to or coincident with the latest occurring Chip Enable.
7. Vcc = 5V ± 5%.
Ordering Information
XXXXX
Device Type
X
Power
XX
Speed
X
Package
Type
X
Process
Temp. Range
X
Preferred
Shipping
Container
Blank Tubes
TR Tape & Reel
TY Tray
Blank Commercial (0° to +70°C)
I
Industrial (-40° to +85°C)
A
Automotive (-40° to +105°C)
TSO 32-pin 300-mil Plastic SOJ
SO 32-pin 400-mil Plastic SOJ
T
32-pin Plastic TSOP (I)
10 Commercial Only
12
15
(use 15 ns for slower designs)
SA Standard Power
LA Low Power
PDM41024 - 1 Meg (128Kx8) Static RAM
8
4/09/98 - Rev. 3.3
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